Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 16266987 authored by Chen-Yu Tsai's avatar Chen-Yu Tsai Committed by Maxime Ripard
Browse files

ARM: dts: sun9i: Switch to the AC100 RTC clock outputs for osc32k 



The 32.768 kHz clock inside the A80 SoC is fed from an external source,
typically the AC100 RTC module.

Make the osc32k placeholder a fixed-factor clock so board dts files can
specify its source.

Signed-off-by: default avatarChen-Yu Tsai <wens@csie.org>
Signed-off-by: default avatarMaxime Ripard <maxime.ripard@free-electrons.com>
parent 38f151d4

arch/arm/boot/dts/sun9i-a80-cubieboard4.dts

+5 −0
Original line number Diff line number Diff line
@@ -103,6 +103,11 @@ 
	allwinner,drive = <SUN4I_PINCTRL_40_MA>;

};



&osc32k {

	/* osc32k input is from AC100 */

	clocks = <&ac100_rtc 0>;

};



&pio {

	led_pins_cubieboard4: led-pins@0 {

		allwinner,pins = "PH6", "PH17";

arch/arm/boot/dts/sun9i-a80-optimus.dts

+5 −0
Original line number Diff line number Diff line
@@ -152,6 +152,11 @@ 
	status = "okay";

};



&osc32k {

	/* osc32k input is from AC100 */

	clocks = <&ac100_rtc 0>;

};



&pio {

	led_pins_optimus: led-pins@0 {

		allwinner,pins = "PH0", "PH1";

arch/arm/boot/dts/sun9i-a80.dtsi

+5 −6
Original line number Diff line number Diff line
@@ -148,15 +148,14 @@ 


		/*

		 * The 32k clock is from an external source, normally the

		 * AC100 codec/RTC chip. This clock is by default enabled

		 * and clocked at 32768 Hz, from the oscillator connected

		 * to the AC100. It is configurable, but no such driver or

		 * bindings exist yet.

		 * AC100 codec/RTC chip. This serves as a placeholder for

		 * board dts files to specify the source.

		 */

		osc32k: osc32k_clk {

			#clock-cells = <0>;

			compatible = "fixed-clock";

			clock-frequency = <32768>;

			compatible = "fixed-factor-clock";

			clock-div = <1>;

			clock-mult = <1>;

			clock-output-names = "osc32k";

		};