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Commit 1456e9d2 authored by Joerg Roedel's avatar Joerg Roedel
Browse files

iommu/amd: Set IOTLB invalidation timeout 



To protect the command buffer from hanging when a device
does not respond to an IOTLB invalidation, set a timeout of
1s for outstanding IOTLB invalidations.

Signed-off-by: default avatarJoerg Roedel <joerg.roedel@amd.com>
parent 2655d7a2

drivers/iommu/amd_iommu_init.c

+13 −0
Original line number Diff line number Diff line
@@ -306,6 +306,16 @@ static void iommu_feature_disable(struct amd_iommu *iommu, u8 bit) 
	writel(ctrl, iommu->mmio_base + MMIO_CONTROL_OFFSET);

}



static void iommu_set_inv_tlb_timeout(struct amd_iommu *iommu, int timeout)

{

	u32 ctrl;



	ctrl = readl(iommu->mmio_base + MMIO_CONTROL_OFFSET);

	ctrl &= ~CTRL_INV_TO_MASK;

	ctrl |= (timeout << CONTROL_INV_TIMEOUT) & CTRL_INV_TO_MASK;

	writel(ctrl, iommu->mmio_base + MMIO_CONTROL_OFFSET);

}



/* Function to enable the hardware */

static void iommu_enable(struct amd_iommu *iommu)

{
@@ -1300,6 +1310,9 @@ static void iommu_init_flags(struct amd_iommu *iommu) 
	 * make IOMMU memory accesses cache coherent

	 */

	iommu_feature_enable(iommu, CONTROL_COHERENT_EN);



	/* Set IOTLB invalidation timeout to 1s */

	iommu_set_inv_tlb_timeout(iommu, CTRL_INV_TO_1S);

}



static void iommu_apply_resume_quirks(struct amd_iommu *iommu)

drivers/iommu/amd_iommu_types.h

+10 −0
Original line number Diff line number Diff line
@@ -127,6 +127,7 @@ 
#define CONTROL_EVT_LOG_EN      0x02ULL

#define CONTROL_EVT_INT_EN      0x03ULL

#define CONTROL_COMWAIT_EN      0x04ULL

#define CONTROL_INV_TIMEOUT	0x05ULL

#define CONTROL_PASSPW_EN       0x08ULL

#define CONTROL_RESPASSPW_EN    0x09ULL

#define CONTROL_COHERENT_EN     0x0aULL
@@ -137,6 +138,15 @@ 
#define CONTROL_PPR_EN          0x0fULL

#define CONTROL_GT_EN           0x10ULL



#define CTRL_INV_TO_MASK	(7 << CONTROL_INV_TIMEOUT)

#define CTRL_INV_TO_NONE	0

#define CTRL_INV_TO_1MS		1

#define CTRL_INV_TO_10MS	2

#define CTRL_INV_TO_100MS	3

#define CTRL_INV_TO_1S		4

#define CTRL_INV_TO_10S		5

#define CTRL_INV_TO_100S	6



/* command specific defines */

#define CMD_COMPL_WAIT          0x01

#define CMD_INV_DEV_ENTRY       0x02