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Commit 141168c3 authored by Kevin Winchester's avatar Kevin Winchester Committed by Ingo Molnar
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x86: Simplify code by removing a !SMP #ifdefs from 'struct cpuinfo_x86'



Several fields in struct cpuinfo_x86 were not defined for the
!SMP case, likely to save space.  However, those fields still
have some meaning for UP, and keeping them allows some #ifdef
removal from other files.  The additional size of the UP kernel
from this change is not significant enough to worry about
keeping up the distinction:

	   text    data     bss     dec     hex filename
	4737168	 506459	 972040	6215667	 5ed7f3	vmlinux.o.before
	4737444	 506459	 972040	6215943	 5ed907	vmlinux.o.after

for a difference of 276 bytes for an example UP config.

If someone wants those 276 bytes back badly then it should
be implemented in a cleaner way.

Signed-off-by: default avatarKevin Winchester <kjwinchester@gmail.com>
Cc: Steffen Persvold <sp@numascale.com>
Link: http://lkml.kernel.org/r/1324428742-12498-1-git-send-email-kjwinchester@gmail.com


Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
parent b49d7d87
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+0 −2
Original line number Diff line number Diff line
@@ -99,7 +99,6 @@ struct cpuinfo_x86 {
	u16			apicid;
	u16			initial_apicid;
	u16			x86_clflush_size;
#ifdef CONFIG_SMP
	/* number of cores as seen by the OS: */
	u16			booted_cores;
	/* Physical processor id: */
@@ -110,7 +109,6 @@ struct cpuinfo_x86 {
	u8			compute_unit_id;
	/* Index into per_cpu list: */
	u16			cpu_index;
#endif
	u32			microcode;
} __attribute__((__aligned__(SMP_CACHE_BYTES)));

+2 −6
Original line number Diff line number Diff line
@@ -123,16 +123,14 @@ int amd_get_subcaches(int cpu)
{
	struct pci_dev *link = node_to_amd_nb(amd_get_nb_id(cpu))->link;
	unsigned int mask;
	int cuid = 0;
	int cuid;

	if (!amd_nb_has_feature(AMD_NB_L3_PARTITIONING))
		return 0;

	pci_read_config_dword(link, 0x1d4, &mask);

#ifdef CONFIG_SMP
	cuid = cpu_data(cpu).compute_unit_id;
#endif
	return (mask >> (4 * cuid)) & 0xf;
}

@@ -141,7 +139,7 @@ int amd_set_subcaches(int cpu, int mask)
	static unsigned int reset, ban;
	struct amd_northbridge *nb = node_to_amd_nb(amd_get_nb_id(cpu));
	unsigned int reg;
	int cuid = 0;
	int cuid;

	if (!amd_nb_has_feature(AMD_NB_L3_PARTITIONING) || mask > 0xf)
		return -EINVAL;
@@ -159,9 +157,7 @@ int amd_set_subcaches(int cpu, int mask)
		pci_write_config_dword(nb->misc, 0x1b8, reg & ~0x180000);
	}

#ifdef CONFIG_SMP
	cuid = cpu_data(cpu).compute_unit_id;
#endif
	mask <<= 4 * cuid;
	mask |= (0xf ^ (1 << cuid)) << 26;

+0 −2
Original line number Diff line number Diff line
@@ -148,7 +148,6 @@ static void __cpuinit init_amd_k6(struct cpuinfo_x86 *c)

static void __cpuinit amd_k7_smp_check(struct cpuinfo_x86 *c)
{
#ifdef CONFIG_SMP
	/* calling is from identify_secondary_cpu() ? */
	if (!c->cpu_index)
		return;
@@ -192,7 +191,6 @@ static void __cpuinit amd_k7_smp_check(struct cpuinfo_x86 *c)

valid_k7:
	;
#endif
}

static void __cpuinit init_amd_k7(struct cpuinfo_x86 *c)
+0 −7
Original line number Diff line number Diff line
@@ -676,9 +676,7 @@ static void __init early_identify_cpu(struct cpuinfo_x86 *c)
	if (this_cpu->c_early_init)
		this_cpu->c_early_init(c);

#ifdef CONFIG_SMP
	c->cpu_index = 0;
#endif
	filter_cpuid_features(c, false);

	setup_smep(c);
@@ -764,10 +762,7 @@ static void __cpuinit generic_identify(struct cpuinfo_x86 *c)
		c->apicid = c->initial_apicid;
# endif
#endif

#ifdef CONFIG_X86_HT
		c->phys_proc_id = c->initial_apicid;
#endif
	}

	setup_smep(c);
@@ -1146,9 +1141,7 @@ static void dbg_restore_debug_regs(void)
 */
void __cpuinit x86_default_fixup_cpu_id(struct cpuinfo_x86 *c, int node)
{
#ifdef CONFIG_NUMA
	pr_err("NUMA core number %d differs from configured core number %d\n", node, c->phys_proc_id);
#endif
}

/*
+0 −2
Original line number Diff line number Diff line
@@ -181,7 +181,6 @@ static void __cpuinit trap_init_f00f_bug(void)

static void __cpuinit intel_smp_check(struct cpuinfo_x86 *c)
{
#ifdef CONFIG_SMP
	/* calling is from identify_secondary_cpu() ? */
	if (!c->cpu_index)
		return;
@@ -198,7 +197,6 @@ static void __cpuinit intel_smp_check(struct cpuinfo_x86 *c)
		WARN_ONCE(1, "WARNING: SMP operation may be unreliable"
				    "with B stepping processors.\n");
	}
#endif
}

static void __cpuinit intel_workarounds(struct cpuinfo_x86 *c)
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