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Commit 140780ab authored by Ben Dooks's avatar Ben Dooks Committed by Ben Dooks
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ARM: S3C24XX: CPUFREQ: S3C2412/S3C2443 IO timing support



Add IO bank timing support for S3C2412/S3C2443.

Signed-off-by: default avatarBen Dooks <ben@simtec.co.uk>
Signed-off-by: default avatarBen Dooks <ben-linux@fluff.org>
parent 25400036
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+3 −0
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@@ -32,9 +32,12 @@ config S3C2412_PM
	help
	  Internal config node to apply S3C2412 power management

# Note, the S3C2412 IOtiming support is in plat-s3c24xx

config S3C2412_CPUFREQ
	bool
	depends on CPU_FREQ_S3C24XX && CPU_S3C2412
	select S3C2412_IOTIMING
	default y
	help
	  CPU Frequency scaling support for S3C2412 and S3C2413 SoC CPUs.
+4 −0
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@@ -185,6 +185,10 @@ static struct s3c_cpufreq_info s3c2412_cpufreq_info = {
	.set_divs	= s3c2412_cpufreq_setdivs,
	.calc_divs	= s3c2412_cpufreq_calcdivs,

	.calc_iotiming	= s3c2412_iotiming_calc,
	.set_iotiming	= s3c2412_iotiming_set,
	.get_iotiming	= s3c2412_iotiming_get,

	.resume_clocks	= s3c2412_setup_clocks,
};

+9 −0
Original line number Diff line number Diff line
@@ -157,6 +157,15 @@ config S3C2410_CPUFREQ_UTILS
	  Internal node to select timing code that is common to the s3c2410
	  and s3c2440/s3c244 cpu frequency support.

# cpu frequency support common to s3c2412, s3c2413 and s3c2442

config S3C2412_IOTIMING
	bool
	depends on CPU_FREQ_S3C24XX && (CPU_S3C2412 || CPU_S3C2443)
	help
	  Intel node to select io timing code that is common to the s3c2412
	  and the s3c2443.

config MACH_SMDK
	bool
	help
+1 −0
Original line number Diff line number Diff line
@@ -40,6 +40,7 @@ obj-$(CONFIG_S3C2410_CLOCK) += s3c2410-clock.o
obj-$(CONFIG_S3C2410_DMA)	+= dma.o
obj-$(CONFIG_S3C24XX_ADC)	+= adc.o
obj-$(CONFIG_S3C2410_IOTIMING)	+= s3c2410-iotiming.o
obj-$(CONFIG_S3C2412_IOTIMING)	+= s3c2412-iotiming.o
obj-$(CONFIG_S3C2410_CPUFREQ_UTILS) += s3c2410-cpufreq-utils.o

# device specific setup and/or initialisation
+51 −1
Original line number Diff line number Diff line
@@ -42,8 +42,44 @@ struct s3c2410_iobank_timing {
	unsigned char	nwait_en;	/* nWait enabled for bank. */
};

/**
 * struct s3c2412_iobank_timing - io timings for PL092 (S3C2412) style IO
 * @idcy: The idle cycle time between transactions.
 * @wstrd: nCS release to end of read cycle.
 * @wstwr: nCS release to end of write cycle.
 * @wstoen: nCS assertion to nOE assertion time.
 * @wstwen: nCS assertion to nWE assertion time.
 * @wstbrd: Burst ready delay.
 * @smbidcyr: Register cache for smbidcyr value.
 * @smbwstrd: Register cache for smbwstrd value.
 * @smbwstwr: Register cache for smbwstwr value.
 * @smbwstoen: Register cache for smbwstoen value.
 * @smbwstwen: Register cache for smbwstwen value.
 * @smbwstbrd: Register cache for smbwstbrd value.
 *
 * Timing information for a IO bank on an S3C2412 or similar system which
 * uses a PL093 block.
 */
struct s3c2412_iobank_timing {
	unsigned int	idcy;
	unsigned int	wstrd;
	unsigned int	wstwr;
	unsigned int	wstoen;
	unsigned int	wstwen;
	unsigned int	wstbrd;

	/* register cache */
	unsigned char	smbidcyr;
	unsigned char	smbwstrd;
	unsigned char	smbwstwr;
	unsigned char	smbwstoen;
	unsigned char	smbwstwen;
	unsigned char	smbwstbrd;
};

union s3c_iobank {
	struct s3c2410_iobank_timing	*io_2410;
	struct s3c2412_iobank_timing	*io_2412;
};

/**
@@ -174,6 +210,20 @@ extern void s3c2410_iotiming_set(struct s3c_cpufreq_config *cfg,

extern void s3c2410_set_fvco(struct s3c_cpufreq_config *cfg);

/* S3C2412 compatible routines */

extern int s3c2412_iotiming_get(struct s3c_cpufreq_config *cfg,
				struct s3c_iotimings *timings);

extern int s3c2412_iotiming_get(struct s3c_cpufreq_config *cfg,
				struct s3c_iotimings *timings);

extern int s3c2412_iotiming_calc(struct s3c_cpufreq_config *cfg,
				 struct s3c_iotimings *iot);

extern void s3c2412_iotiming_set(struct s3c_cpufreq_config *cfg,
				 struct s3c_iotimings *iot);

#ifdef CONFIG_CPU_FREQ_S3C24XX_DEBUG
#define s3c_freq_dbg(x...) printk(KERN_INFO x)
#else
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