Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 13d45709 authored by Pavel Hofman's avatar Pavel Hofman Committed by Jaroslav Kysela
Browse files

[ALSA] emu10k1 - EMU 1212 with 16 capture channels 



* adding 8 more 32-bit capture channels (total of 16) for emu1010 cards
* adding some code comments and card details description

Signed-off-by: default avatarPavel Hofman <dustin@seznam.cz>
Signed-off-by: default avatarTakashi Iwai <tiwai@suse.de>
Signed-off-by: default avatarJaroslav Kysela <perex@suse.cz>
parent 15cc4458

include/sound/emu10k1.h

+16 −0
Original line number Diff line number Diff line
@@ -1120,6 +1120,16 @@ 
/************************************************************************************************/

/* EMU1010m HANA Destinations									*/

/************************************************************************************************/

/* 32-bit destinations of signal in the Hana FPGA. Destinations are either

 * physical outputs of Hana, or outputs going to Alice2 (audigy) for capture

 * - 16 x EMU_DST_ALICE2_EMU32_X.

 */

/* EMU32 = 32-bit serial channel between Alice2 (audigy) and Hana (FPGA) */

/* EMU_DST_ALICE2_EMU32_X - data channels from Hana to Alice2 used for capture.

 * Which data is fed into a EMU_DST_ALICE2_EMU32_X channel in Hana depends on

 * setup of mixer control for each destination - see emumixer.c -

 * snd_emu1010_output_enum_ctls[], snd_emu1010_input_enum_ctls[]

 */

#define EMU_DST_ALICE2_EMU32_0	0x000f	/* 16 EMU32 channels to Alice2 +0 to +0xf */

#define EMU_DST_ALICE2_EMU32_1	0x0000	/* 16 EMU32 channels to Alice2 +0 to +0xf */

#define EMU_DST_ALICE2_EMU32_2	0x0001	/* 16 EMU32 channels to Alice2 +0 to +0xf */
@@ -1199,6 +1209,12 @@ 
/************************************************************************************************/

/* EMU1010m HANA Sources									*/

/************************************************************************************************/

/* 32-bit sources of signal in the Hana FPGA. The sources are routed to

 * destinations using mixer control for each destination - see emumixer.c

 * Sources are either physical inputs of FPGA,

 * or outputs from Alice (audigy) - 16 x EMU_SRC_ALICE_EMU32A +

 * 16 x EMU_SRC_ALICE_EMU32B

 */

#define EMU_SRC_SILENCE		0x0000	/* Silence */

#define EMU_SRC_DOCK_MIC_A1	0x0100	/* Audio Dock Mic A, 1st or 48kHz only */

#define EMU_SRC_DOCK_MIC_A2	0x0101	/* Audio Dock Mic A, 2nd or 96kHz */

sound/pci/emu10k1/emu10k1_main.c

+52 −0
Original line number Diff line number Diff line
@@ -694,6 +694,37 @@ static int snd_emu1010_load_firmware(struct snd_emu10k1 * emu, const char * file 
	return 0;

}



/*

 * EMU-1010 - details found out from this driver, official MS Win drivers,

 * testing the card:

 *

 * Audigy2 (aka Alice2):

 * ---------------------

 * 	* communication over PCI

 * 	* conversion of 32-bit data coming over EMU32 links from HANA FPGA

 *	  to 2 x 16-bit, using internal DSP instructions

 * 	* slave mode, clock supplied by HANA

 * 	* linked to HANA using:

 * 		32 x 32-bit serial EMU32 output channels

 * 		16 x EMU32 input channels

 * 		(?) x I2S I/O channels (?)

 *

 * FPGA (aka HANA):

 * ---------------

 * 	* provides all (?) physical inputs and outputs of the card

 * 		(ADC, DAC, SPDIF I/O, ADAT I/O, etc.)

 * 	* provides clock signal for the card and Alice2

 * 	* two crystals - for 44.1kHz and 48kHz multiples

 * 	* provides internal routing of signal sources to signal destinations

 * 	* inputs/outputs to Alice2 - see above

 *

 * Current status of the driver:

 * ----------------------------

 * 	* only 44.1/48kHz supported (the MS Win driver supports up to 192 kHz)

 * 	* PCM device nb. 2:

 *		16 x 16-bit playback - snd_emu10k1_fx8010_playback_ops

 * 		16 x 32-bit capture - snd_emu10k1_capture_efx_ops

 */

static int snd_emu10k1_emu1010_init(struct snd_emu10k1 * emu)

{

	unsigned int i;
@@ -850,6 +881,27 @@ static int snd_emu10k1_emu1010_init(struct snd_emu10k1 * emu) 
		EMU_DST_ALICE2_EMU32_6, EMU_SRC_DOCK_ADC2_LEFT1);

	snd_emu1010_fpga_link_dst_src_write(emu,

		EMU_DST_ALICE2_EMU32_7, EMU_SRC_DOCK_ADC2_RIGHT1);

	/* Pavel Hofman - setting defaults for 8 more capture channels

	 * Defaults only, users will set their own values anyways, let's

	 * just copy/paste.

	 */

	

	snd_emu1010_fpga_link_dst_src_write(emu,

		EMU_DST_ALICE2_EMU32_8, EMU_SRC_DOCK_MIC_A1);

	snd_emu1010_fpga_link_dst_src_write(emu,

		EMU_DST_ALICE2_EMU32_9, EMU_SRC_DOCK_MIC_B1);

	snd_emu1010_fpga_link_dst_src_write(emu,

		EMU_DST_ALICE2_EMU32_A, EMU_SRC_HAMOA_ADC_LEFT2);

	snd_emu1010_fpga_link_dst_src_write(emu,

		EMU_DST_ALICE2_EMU32_B, EMU_SRC_HAMOA_ADC_LEFT2);

	snd_emu1010_fpga_link_dst_src_write(emu,

		EMU_DST_ALICE2_EMU32_C, EMU_SRC_DOCK_ADC1_LEFT1);

	snd_emu1010_fpga_link_dst_src_write(emu,

		EMU_DST_ALICE2_EMU32_D, EMU_SRC_DOCK_ADC1_RIGHT1);

	snd_emu1010_fpga_link_dst_src_write(emu,

		EMU_DST_ALICE2_EMU32_E, EMU_SRC_DOCK_ADC2_LEFT1);

	snd_emu1010_fpga_link_dst_src_write(emu,

		EMU_DST_ALICE2_EMU32_F, EMU_SRC_DOCK_ADC2_RIGHT1);

#endif

#if 0

	/* Original */

sound/pci/emu10k1/emufx.c

+76 −2
Original line number Diff line number Diff line
@@ -1123,6 +1123,11 @@ snd_emu10k1_init_stereo_onoff_control(struct snd_emu10k1_fx8010_control_gpr *ctl 
	ctl->translation = EMU10K1_GPR_TRANSLATION_ONOFF;

}



/*

 * Used for emu1010 - conversion from 32-bit capture inputs from HANA

 * to 2 x 16-bit registers in audigy - their values are read via DMA.

 * Conversion is performed by Audigy DSP instructions of FX8010.

 */

static int snd_emu10k1_audigy_dsp_convert_32_to_2x16(

				struct snd_emu10k1_fx8010_code *icode,

				u32 *ptr, int tmp, int bit_shifter16,
@@ -1193,7 +1198,11 @@ static int __devinit _snd_emu10k1_audigy_init_efx(struct snd_emu10k1 *emu) 
	snd_emu10k1_ptr_write(emu, A_DBG, 0, (emu->fx8010.dbg = 0) | A_DBG_SINGLE_STEP);



#if 1

	/* PCM front Playback Volume (independent from stereo mix) */

	/* PCM front Playback Volume (independent from stereo mix)

	 * playback = 0 + ( gpr * FXBUS_PCM_LEFT_FRONT >> 31)

	 * where gpr contains attenuation from corresponding mixer control

	 * (snd_emu10k1_init_stereo_control)

	 */

	A_OP(icode, &ptr, iMAC0, A_GPR(playback), A_C_00000000, A_GPR(gpr), A_FXBUS(FXBUS_PCM_LEFT_FRONT));

	A_OP(icode, &ptr, iMAC0, A_GPR(playback+1), A_C_00000000, A_GPR(gpr+1), A_FXBUS(FXBUS_PCM_RIGHT_FRONT));

	snd_emu10k1_init_stereo_control(&controls[nctl++], "PCM Front Playback Volume", gpr, 100);
@@ -1549,7 +1558,7 @@ A_OP(icode, &ptr, iMAC0, A_GPR(var), A_GPR(var), A_GPR(vol), A_EXTIN(input)) 


	if (emu->card_capabilities->emu1010) {

		snd_printk("EMU inputs on\n");

		/* Capture 8 channels of S32_LE sound */

		/* Capture 16 (originally 8) channels of S32_LE sound */

		

		/* printk("emufx.c: gpr=0x%x, tmp=0x%x\n",gpr, tmp); */

		/* For the EMU1010: How to get 32bit values from the DSP. High 16bits into L, low 16bits into R. */
@@ -1560,6 +1569,11 @@ A_OP(icode, &ptr, iMAC0, A_GPR(var), A_GPR(var), A_GPR(vol), A_EXTIN(input)) 
		snd_emu10k1_audigy_dsp_convert_32_to_2x16( icode, &ptr, tmp, bit_shifter16, A_P16VIN(0x0), A_FXBUS2(0) );

		/* Right ADC in 1 of 2 */

		gpr_map[gpr++] = 0x00000000;

		/* Delaying by one sample: instead of copying the input

		 * value A_P16VIN to output A_FXBUS2 as in the first channel,

		 * we use an auxiliary register, delaying the value by one

		 * sample

		 */

		snd_emu10k1_audigy_dsp_convert_32_to_2x16( icode, &ptr, tmp, bit_shifter16, A_GPR(gpr - 1), A_FXBUS2(2) );

		A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0x1), A_C_00000000, A_C_00000000);

		gpr_map[gpr++] = 0x00000000;
@@ -1583,6 +1597,66 @@ A_OP(icode, &ptr, iMAC0, A_GPR(var), A_GPR(var), A_GPR(vol), A_EXTIN(input)) 
		gpr_map[gpr++] = 0x00000000;

		snd_emu10k1_audigy_dsp_convert_32_to_2x16( icode, &ptr, tmp, bit_shifter16, A_GPR(gpr - 1), A_FXBUS2(0xe) );

		A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0x7), A_C_00000000, A_C_00000000);

		/* Pavel Hofman - we still have voices, A_FXBUS2s, and

		 * A_P16VINs available -

		 * let's add 8 more capture channels - total of 16

		 */

		gpr_map[gpr++] = 0x00000000;

		snd_emu10k1_audigy_dsp_convert_32_to_2x16(icode, &ptr, tmp,

							  bit_shifter16,

							  A_GPR(gpr - 1),

							  A_FXBUS2(0x10));

		A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0x8),

		     A_C_00000000, A_C_00000000);

		gpr_map[gpr++] = 0x00000000;

		snd_emu10k1_audigy_dsp_convert_32_to_2x16(icode, &ptr, tmp,

							  bit_shifter16,

							  A_GPR(gpr - 1),

							  A_FXBUS2(0x12));

		A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0x9),

		     A_C_00000000, A_C_00000000);

		gpr_map[gpr++] = 0x00000000;

		snd_emu10k1_audigy_dsp_convert_32_to_2x16(icode, &ptr, tmp,

							  bit_shifter16,

							  A_GPR(gpr - 1),

							  A_FXBUS2(0x14));

		A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0xa),

		     A_C_00000000, A_C_00000000);

		gpr_map[gpr++] = 0x00000000;

		snd_emu10k1_audigy_dsp_convert_32_to_2x16(icode, &ptr, tmp,

							  bit_shifter16,

							  A_GPR(gpr - 1),

							  A_FXBUS2(0x16));

		A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0xb),

		     A_C_00000000, A_C_00000000);

		gpr_map[gpr++] = 0x00000000;

		snd_emu10k1_audigy_dsp_convert_32_to_2x16(icode, &ptr, tmp,

							  bit_shifter16,

							  A_GPR(gpr - 1),

							  A_FXBUS2(0x18));

		A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0xc),

		     A_C_00000000, A_C_00000000);

		gpr_map[gpr++] = 0x00000000;

		snd_emu10k1_audigy_dsp_convert_32_to_2x16(icode, &ptr, tmp,

							  bit_shifter16,

							  A_GPR(gpr - 1),

							  A_FXBUS2(0x1a));

		A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0xd),

		     A_C_00000000, A_C_00000000);

		gpr_map[gpr++] = 0x00000000;

		snd_emu10k1_audigy_dsp_convert_32_to_2x16(icode, &ptr, tmp,

							  bit_shifter16,

							  A_GPR(gpr - 1),

							  A_FXBUS2(0x1c));

		A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0xe),

		     A_C_00000000, A_C_00000000);

		gpr_map[gpr++] = 0x00000000;

		snd_emu10k1_audigy_dsp_convert_32_to_2x16(icode, &ptr, tmp,

							  bit_shifter16,

							  A_GPR(gpr - 1),

							  A_FXBUS2(0x1e));

		A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0xf),

		     A_C_00000000, A_C_00000000);



#if 0

		for (z = 4; z < 8; z++) {

sound/pci/emu10k1/emumixer.c

+16 −0
Original line number Diff line number Diff line
@@ -77,6 +77,10 @@ static int snd_emu10k1_spdif_get_mask(struct snd_kcontrol *kcontrol, 
	return 0;

}



/*

 * Items labels in enum mixer controls assigning source data to

 * each destination

 */

static char *emu1010_src_texts[] = { 

	"Silence",

	"Dock Mic A",
@@ -133,6 +137,9 @@ static char *emu1010_src_texts[] = { 
	"DSP 31",

};



/*

 * List of data sources available for each destination

 */

static unsigned int emu1010_src_regs[] = {

	EMU_SRC_SILENCE,/* 0 */

	EMU_SRC_DOCK_MIC_A1, /* 1 */
@@ -189,6 +196,10 @@ static unsigned int emu1010_src_regs[] = { 
	EMU_SRC_ALICE_EMU32B+0xf, /* 52 */

};



/*

 * Data destinations - physical EMU outputs.

 * Each destination has an enum mixer control to choose a data source

 */

static unsigned int emu1010_output_dst[] = {

	EMU_DST_DOCK_DAC1_LEFT1, /* 0 */

	EMU_DST_DOCK_DAC1_RIGHT1, /* 1 */
@@ -216,6 +227,11 @@ static unsigned int emu1010_output_dst[] = { 
	EMU_DST_HANA_ADAT+7, /* 23 */

};



/*

 * Data destinations - HANA outputs going to Alice2 (audigy) for

 *   capture (EMU32 + I2S links)

 * Each destination has an enum mixer control to choose a data source

 */

static unsigned int emu1010_input_dst[] = {

	EMU_DST_ALICE2_EMU32_0,

	EMU_DST_ALICE2_EMU32_1,

sound/pci/emu10k1/emupcm.c

+28 −11
Original line number Diff line number Diff line
@@ -1233,6 +1233,7 @@ static int snd_emu10k1_capture_efx_open(struct snd_pcm_substream *substream) 
	runtime->hw.rate_min = runtime->hw.rate_max = 48000;

	spin_lock_irq(&emu->reg_lock);

	if (emu->card_capabilities->emu1010) {

		/*  Nb. of channels has been increased to 16 */

		/* TODO

		 * SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE

		 * SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |
@@ -1240,17 +1241,18 @@ static int snd_emu10k1_capture_efx_open(struct snd_pcm_substream *substream) 
		 * SNDRV_PCM_RATE_176400 | SNDRV_PCM_RATE_192000

		 * rate_min = 44100,

		 * rate_max = 192000,

		 * channels_min = 8,

		 * channels_max = 8,

		 * channels_min = 16,

		 * channels_max = 16,

		 * Need to add mixer control to fix sample rate

		 *                 

		 * There are 16 mono channels of 16bits each.

		 * There are 32 mono channels of 16bits each.

		 * 24bit Audio uses 2x channels over 16bit

		 * 96kHz uses 2x channels over 48kHz

		 * 192kHz uses 4x channels over 48kHz

		 * So, for 48kHz 24bit, one has 8 channels

		 * for 96kHz 24bit, one has 4 channels

		 * for 192kHz 24bit, one has 2 channels

		 * So, for 48kHz 24bit, one has 16 channels

		 * for 96kHz 24bit, one has 8 channels

		 * for 192kHz 24bit, one has 4 channels

		 *

		 */

#if 1

		switch (emu->emu1010.internal_clock) {
@@ -1258,13 +1260,15 @@ static int snd_emu10k1_capture_efx_open(struct snd_pcm_substream *substream) 
			/* For 44.1kHz */

			runtime->hw.rates = SNDRV_PCM_RATE_44100;

			runtime->hw.rate_min = runtime->hw.rate_max = 44100;

			runtime->hw.channels_min = runtime->hw.channels_max = 8;

			runtime->hw.channels_min =

				runtime->hw.channels_max = 16;

			break;

		case 1:

			/* For 48kHz */

			runtime->hw.rates = SNDRV_PCM_RATE_48000;

			runtime->hw.rate_min = runtime->hw.rate_max = 48000;

			runtime->hw.channels_min = runtime->hw.channels_max = 8;

			runtime->hw.channels_min =

				runtime->hw.channels_max = 16;

			break;

		};

#endif
@@ -1282,7 +1286,7 @@ static int snd_emu10k1_capture_efx_open(struct snd_pcm_substream *substream) 
#endif

		runtime->hw.formats = SNDRV_PCM_FMTBIT_S32_LE;

		/* efx_voices_mask[0] is expected to be zero

 		 * efx_voices_mask[1] is expected to have 16bits set

 		 * efx_voices_mask[1] is expected to have 32bits set

		 */

	} else {

		runtime->hw.channels_min = runtime->hw.channels_max = 0;
@@ -1787,11 +1791,24 @@ int __devinit snd_emu10k1_pcm_efx(struct snd_emu10k1 * emu, int device, struct s 
	/* emu->efx_voices_mask[0] = FXWC_DEFAULTROUTE_C | FXWC_DEFAULTROUTE_A; */

	if (emu->audigy) {

		emu->efx_voices_mask[0] = 0;

		if (emu->card_capabilities->emu1010)

			/* Pavel Hofman - 32 voices will be used for

			 * capture (write mode) -

			 * each bit = corresponding voice

			 */

			emu->efx_voices_mask[1] = 0xffffffff;

		else

			emu->efx_voices_mask[1] = 0xffff;

	} else {

		emu->efx_voices_mask[0] = 0xffff0000;

		emu->efx_voices_mask[1] = 0;

	}

	/* For emu1010, the control has to set 32 upper bits (voices)

	 * out of the 64 bits (voices) to true for the 16-channels capture

	 * to work correctly. Correct A_FXWC2 initial value (0xffffffff)

	 * is already defined but the snd_emu10k1_pcm_efx_voices_mask

	 * control can override this register's value.

	 */

	kctl = snd_ctl_new1(&snd_emu10k1_pcm_efx_voices_mask, emu);

	if (!kctl)

		return -ENOMEM;