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Commit 132c803f authored by Laxman Dewangan's avatar Laxman Dewangan Committed by Wolfram Sang
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i2c: tegra: check the clk_prepare_enable() return value 



NVIDIA's Tegra SoC allows read/write of controller register only
if controller clock is enabled. System hangs if read/write happens
to registers without enabling clock.

clk_prepare_enable() can be fail due to unknown reason and hence
adding check for return value of this function. If this function
success then only access register otherwise return to caller with
error.

Signed-off-by: default avatarLaxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: default avatarStephen Warren <swarren@nvidia.com>
Signed-off-by: default avatarWolfram Sang <wsa@the-dreams.de>
Cc: stable@kernel.org
parent a937536b

drivers/i2c/busses/i2c-tegra.c

+11 −2
Original line number Diff line number Diff line
@@ -411,7 +411,11 @@ static int tegra_i2c_init(struct tegra_i2c_dev *i2c_dev) 
	int clk_multiplier = I2C_CLK_MULTIPLIER_STD_FAST_MODE;

	u32 clk_divisor;



	tegra_i2c_clock_enable(i2c_dev);

	err = tegra_i2c_clock_enable(i2c_dev);

	if (err < 0) {

		dev_err(i2c_dev->dev, "Clock enable failed %d\n", err);

		return err;

	}



	tegra_periph_reset_assert(i2c_dev->div_clk);

	udelay(2);
@@ -628,7 +632,12 @@ static int tegra_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], 
	if (i2c_dev->is_suspended)

		return -EBUSY;



	tegra_i2c_clock_enable(i2c_dev);

	ret = tegra_i2c_clock_enable(i2c_dev);

	if (ret < 0) {

		dev_err(i2c_dev->dev, "Clock enable failed %d\n", ret);

		return ret;

	}



	for (i = 0; i < num; i++) {

		enum msg_end_type end_type = MSG_END_STOP;

		if (i < (num - 1)) {