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Commit 1289ace5 authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull first round of SCSI updates from James Bottomley:
 "This includes driver updates from the usual suspects (bfa, arcmsr,
  scsi_dh_alua, lpfc, storvsc, cxlflash).

  The major change is the addition of the hisi_sas driver, which is an
  ARM platform device for SAS.  The other change of note is an enormous
  style transformation to the atp870u driver (which is our worst written
  SCSI driver)"

* tag 'scsi-misc' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi: (169 commits)
  cxlflash: Enable device id for future IBM CXL adapter
  cxlflash: Resolve oops in wait_port_offline
  cxlflash: Fix to resolve cmd leak after host reset
  cxlflash: Removed driver date print
  cxlflash: Fix to avoid virtual LUN failover failure
  cxlflash: Fix to escalate LINK_RESET also on port 1
  storvsc: Tighten up the interrupt path
  storvsc: Refactor the code in storvsc_channel_init()
  storvsc: Properly support Fibre Channel devices
  storvsc: Fix a bug in the layout of the hv_fc_wwn_packet
  mvsas: Add SGPIO support to Marvell 94xx
  mpt3sas: A correction in unmap_resources
  hpsa: Add box and bay information for enclosure devices
  hpsa: Change SAS transport devices to bus 0.
  hpsa: fix path_info_show
  cciss: print max outstanding commands as a hex value
  scsi_debug: Increase the reported optimal transfer length
  lpfc: Update version to 11.0.0.10 for upstream patch set
  lpfc: Use kzalloc instead of kmalloc
  lpfc: Delete unnecessary checks before the function call "mempool_destroy"
  ...
parents d080827f abaee091
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* HiSilicon SAS controller

The HiSilicon SAS controller supports SAS/SATA.

Main node required properties:
  - compatible : value should be as follows:
	(a) "hisilicon,hip05-sas-v1" for v1 hw in hip05 chipset
  - sas-addr : array of 8 bytes for host SAS address
  - reg : Address and length of the SAS register
  - hisilicon,sas-syscon: phandle of syscon used for sas control
  - ctrl-reset-reg : offset to controller reset register in ctrl reg
  - ctrl-reset-sts-reg : offset to controller reset status register in ctrl reg
  - ctrl-clock-ena-reg : offset to controller clock enable register in ctrl reg
  - queue-count : number of delivery and completion queues in the controller
  - phy-count : number of phys accessible by the controller
  - interrupts : Interrupts for phys, completion queues, and fatal
		sources; the interrupts are ordered in 3 groups, as follows:
			- Phy interrupts
			- Completion queue interrupts
			- Fatal interrupts
		Phy interrupts : Each phy has 3 interrupt sources:
			- broadcast
			- phyup
			- abnormal
		The phy interrupts are ordered into groups of 3 per phy
		(broadcast, phyup, and abnormal) in increasing order.
		Completion queue interrupts : each completion queue has 1
			interrupt source.
			The interrupts are ordered in increasing order.
		Fatal interrupts : the fatal interrupts are ordered as follows:
			- ECC
			- AXI bus

Example:
	sas0: sas@c1000000 {
		compatible = "hisilicon,hip05-sas-v1";
		sas-addr = [50 01 88 20 16 00 00 0a];
		reg = <0x0 0xc1000000 0x0 0x10000>;
		hisilicon,sas-syscon = <&pcie_sas>;
		ctrl-reset-reg = <0xa60>;
		ctrl-reset-sts-reg = <0x5a30>;
		ctrl-clock-ena-reg = <0x338>;
		queue-count = <32>;
		phy-count = <8>;
		dma-coherent;
		interrupt-parent = <&mbigen_dsa>;
		interrupts =    <259 4>,<263 4>,<264 4>,/* phy0 */
				<269 4>,<273 4>,<274 4>,/* phy1 */
				<279 4>,<283 4>,<284 4>,/* phy2 */
				<289 4>,<293 4>,<294 4>,/* phy3 */
				<299 4>,<303 4>,<304 4>,/* phy4 */
				<309 4>,<313 4>,<314 4>,/* phy5 */
				<319 4>,<323 4>,<324 4>,/* phy6 */
				<329 4>,<333 4>,<334 4>,/* phy7 */
				<336 1>,<337 1>,<338 1>,/* cq0-2 */
				<339 1>,<340 1>,<341 1>,/* cq3-5 */
				<342 1>,<343 1>,<344 1>,/* cq6-8 */
				<345 1>,<346 1>,<347 1>,/* cq9-11 */
				<348 1>,<349 1>,<350 1>,/* cq12-14 */
				<351 1>,<352 1>,<353 1>,/* cq15-17 */
				<354 1>,<355 1>,<356 1>,/* cq18-20 */
				<357 1>,<358 1>,<359 1>,/* cq21-23 */
				<360 1>,<361 1>,<362 1>,/* cq24-26 */
				<363 1>,<364 1>,<365 1>,/* cq27-29 */
				<366 1>,<367 1>/* cq30-31 */
				<376 4>,/* fatal ecc */
				<381 4>;/* fatal axi */
		status = "disabled";
	};
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@@ -5038,6 +5038,13 @@ F: include/uapi/linux/if_hippi.h
F:	net/802/hippi.c
F:	drivers/net/hippi/

HISILICON SAS Controller
M:	John Garry <john.garry@huawei.com>
W:	http://www.hisilicon.com
S:	Supported
F:	drivers/scsi/hisi_sas/
F:	Documentation/devicetree/bindings/scsi/hisilicon-sas.txt

HOST AP DRIVER
M:	Jouni Malinen <j@w1.fi>
L:	hostap@shmoo.com (subscribers-only)
+1 −1
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@@ -3848,7 +3848,7 @@ static void print_cfg_table(ctlr_info_t *h)
	       readl(&(tb->HostWrite.CoalIntDelay)));
	dev_dbg(&h->pdev->dev, "   Coalesce Interrupt Count = 0x%x\n",
	       readl(&(tb->HostWrite.CoalIntCount)));
	dev_dbg(&h->pdev->dev, "   Max outstanding commands = 0x%d\n",
	dev_dbg(&h->pdev->dev, "   Max outstanding commands = 0x%x\n",
	       readl(&(tb->CmdsOutMax)));
	dev_dbg(&h->pdev->dev, "   Bus Types = 0x%x\n",
		readl(&(tb->BusTypes)));
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@@ -194,6 +194,7 @@ config CHR_DEV_SCH
config SCSI_ENCLOSURE
	tristate "SCSI Enclosure Support"
	depends on SCSI && ENCLOSURE_SERVICES
	depends on m || SCSI_SAS_ATTRS != m
	help
	  Enclosures are devices sitting on or in SCSI backplanes that
	  manage devices.  If you have a disk cage, the chances are that
@@ -474,6 +475,7 @@ config SCSI_AACRAID
source "drivers/scsi/aic7xxx/Kconfig.aic7xxx"
source "drivers/scsi/aic7xxx/Kconfig.aic79xx"
source "drivers/scsi/aic94xx/Kconfig"
source "drivers/scsi/hisi_sas/Kconfig"
source "drivers/scsi/mvsas/Kconfig"

config SCSI_MVUMI
+1 −0
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@@ -157,6 +157,7 @@ obj-$(CONFIG_CHR_DEV_SCH) += ch.o
obj-$(CONFIG_SCSI_ENCLOSURE)	+= ses.o

obj-$(CONFIG_SCSI_OSD_INITIATOR) += osd/
obj-$(CONFIG_SCSI_HISI_SAS) += hisi_sas/

# This goes last, so that "real" scsi devices probe earlier
obj-$(CONFIG_SCSI_DEBUG)	+= scsi_debug.o
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