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Commit 10b98368 authored by Krzysztof Halasa's avatar Krzysztof Halasa Committed by Linus Torvalds
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Intel FB: support for interlaced video modes



Intel framebuffer now supports interlaced video modes.

Signed-off-by: default avatarKrzysztof Halasa <khc@pm.waw.pl>
Cc: "Antonino A. Daplas" <adaplas@pol.net>
Cc: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: default avatarAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: default avatarLinus Torvalds <torvalds@linux-foundation.org>
parent 68e5e9d7
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+7 −5
Original line number Diff line number Diff line
@@ -323,11 +323,7 @@ intelfbhw_validate_mode(struct intelfb_info *dinfo,
		return 1;
	}

	/* Check for interlaced/doublescan modes. */
	if (var->vmode & FB_VMODE_INTERLACED) {
		WRN_MSG("Mode is interlaced.\n");
		return 1;
	}
	/* Check for doublescan modes. */
	if (var->vmode & FB_VMODE_DOUBLE) {
		WRN_MSG("Mode is double-scan.\n");
		return 1;
@@ -1220,6 +1216,12 @@ intelfbhw_mode_to_hw(struct intelfb_info *dinfo, struct intelfb_hwstate *hw,

	/* Set the palette to 8-bit mode. */
	*pipe_conf &= ~PIPECONF_GAMMA;

	if (var->vmode & FB_VMODE_INTERLACED)
		*pipe_conf |= PIPECONF_INTERLACE_W_FIELD_INDICATION;
	else
		*pipe_conf &= ~PIPECONF_INTERLACE_MASK;

	return 0;
}

+4 −0
Original line number Diff line number Diff line
@@ -286,6 +286,10 @@
#define PIPECONF_UNLOCKED		0
#define PIPECONF_GAMMA			(1 << 24)
#define PIPECONF_PALETTE		0
#define PIPECONF_PROGRESSIVE			(0 << 21)
#define PIPECONF_INTERLACE_W_FIELD_INDICATION	(6 << 21)
#define PIPECONF_INTERLACE_FIELD_0_ONLY		(7 << 21)
#define PIPECONF_INTERLACE_MASK			(7 << 21)

#define DISPARB			0x70030
#define DISPARB_AEND_MASK		0x1ff