Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 0fbdd270 authored by Ben Dooks's avatar Ben Dooks
Browse files

Merge branch 'next-s3c24xx' into next-s3c

parents 69e37289 a2c195fd

arch/arm/mach-s3c2410/include/mach/irqs.h

+6 −0
Original line number Original line Diff line number Diff line
@@ -164,6 +164,12 @@ 
#define IRQ_S3CUART_TX3		IRQ_S3C2443_TX3

#define IRQ_S3CUART_TX3		IRQ_S3C2443_TX3

#define IRQ_S3CUART_ERR3	IRQ_S3C2443_ERR3

#define IRQ_S3CUART_ERR3	IRQ_S3C2443_ERR3





#ifdef CONFIG_CPU_S3C2440

#define IRQ_S3C244x_AC97 IRQ_S3C2440_AC97

#else

#define IRQ_S3C244x_AC97 IRQ_S3C2443_AC97

#endif



/* Our FIQs are routable from IRQ_EINT0 to IRQ_ADCPARENT */

/* Our FIQs are routable from IRQ_EINT0 to IRQ_ADCPARENT */

#define FIQ_START		IRQ_EINT0

#define FIQ_START		IRQ_EINT0

arch/arm/mach-s3c2410/include/mach/regs-gpio.h

+3 −1
Original line number Original line Diff line number Diff line
@@ -328,13 +328,15 @@ 




#define S3C2410_GPD8_VD16	(0x02 << 16)

#define S3C2410_GPD8_VD16	(0x02 << 16)

#define S3C2400_GPD8_TOUT3	(0x02 << 16)

#define S3C2400_GPD8_TOUT3	(0x02 << 16)

#define S3C2440_GPD8_SPIMISO1	(0x03 << 16)





#define S3C2410_GPD9_VD17	(0x02 << 18)

#define S3C2410_GPD9_VD17	(0x02 << 18)

#define S3C2400_GPD9_TCLK0	(0x02 << 18)

#define S3C2400_GPD9_TCLK0	(0x02 << 18)

#define S3C2410_GPD9_MASK       (0x03 << 18)

#define S3C2440_GPD9_SPIMOSI1	(0x03 << 18)





#define S3C2410_GPD10_VD18	(0x02 << 20)

#define S3C2410_GPD10_VD18	(0x02 << 20)

#define S3C2400_GPD10_nWAIT	(0x02 << 20)

#define S3C2400_GPD10_nWAIT	(0x02 << 20)

#define S3C2440_GPD10_SPICLK1	(0x03 << 20)





#define S3C2410_GPD11_VD19	(0x02 << 22)

#define S3C2410_GPD11_VD19	(0x02 << 22)

arch/arm/mach-s3c2410/include/mach/spi.h

+3 −0
Original line number Original line Diff line number Diff line
@@ -30,4 +30,7 @@ extern void s3c24xx_spi_gpiocfg_bus0_gpe11_12_13(struct s3c2410_spi_info *spi, 
extern void s3c24xx_spi_gpiocfg_bus1_gpg5_6_7(struct s3c2410_spi_info *spi,

extern void s3c24xx_spi_gpiocfg_bus1_gpg5_6_7(struct s3c2410_spi_info *spi,

					      int enable);

					      int enable);





extern void s3c24xx_spi_gpiocfg_bus1_gpd8_9_10(struct s3c2410_spi_info *spi,

					       int enable);



#endif /* __ASM_ARCH_SPI_H */
 
#endif /* __ASM_ARCH_SPI_H */

arch/arm/plat-s3c/include/plat/devs.h

+1 −0
Original line number Original line Diff line number Diff line
@@ -58,5 +58,6 @@ extern struct platform_device s3c_device_usb_hsotg; 
#ifdef CONFIG_CPU_S3C2440

#ifdef CONFIG_CPU_S3C2440





extern struct platform_device s3c_device_camif;

extern struct platform_device s3c_device_camif;

extern struct platform_device s3c_device_ac97;





#endif
 
#endif

arch/arm/plat-s3c24xx/Kconfig

+6 −0
Original line number Original line Diff line number Diff line
@@ -105,6 +105,12 @@ config S3C24XX_SPI_BUS1_GPG5_GPG6_GPG7 
	  SPI GPIO configuration code for BUS 1 when connected to

	  SPI GPIO configuration code for BUS 1 when connected to

	  GPG5, GPG6 and GPG7.

	  GPG5, GPG6 and GPG7.





config S3C24XX_SPI_BUS1_GPD8_GPD9_GPD10

	bool

	help

	  SPI GPIO configuration code for BUS 1 when connected to

	  GPD8, GPD9 and GPD10.



# common code for s3c24xx based machines, such as the SMDKs.

# common code for s3c24xx based machines, such as the SMDKs.





config MACH_SMDK

config MACH_SMDK