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Commit 0e4ca100 authored by Chris Wilson's avatar Chris Wilson
Browse files

drm/i915: Fix ordering of sanitize ppgtt and sanitize execlists 



The i915.enable_ppgtt option depends upon the state of
i915.enable_execlists option - so we need to sanitize execlists first.

Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: default avatarJoonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1461932305-14637-2-git-send-email-chris@chris-wilson.co.uk
parent a58c01aa

drivers/gpu/drm/i915/i915_dma.c

+13 −0
Original line number Diff line number Diff line
@@ -968,6 +968,19 @@ static void intel_device_info_runtime_init(struct drm_device *dev) 
			 info->has_subslice_pg ? "y" : "n");

	DRM_DEBUG_DRIVER("has EU power gating: %s\n",

			 info->has_eu_pg ? "y" : "n");



	i915.enable_execlists =

		intel_sanitize_enable_execlists(dev, i915.enable_execlists);



	/*

	 * i915.enable_ppgtt is read-only, so do an early pass to validate the

	 * user's requested state against the hardware/driver capabilities.  We

	 * do this now so that we can print out any log messages once rather

	 * than every time we check intel_enable_ppgtt().

	 */

	i915.enable_ppgtt =

		intel_sanitize_enable_ppgtt(dev, i915.enable_ppgtt);

	DRM_DEBUG_DRIVER("ppgtt mode: %i\n", i915.enable_ppgtt);

}



static void intel_init_dpio(struct drm_i915_private *dev_priv)

drivers/gpu/drm/i915/i915_drv.h

+2 −0
Original line number Diff line number Diff line
@@ -2753,6 +2753,8 @@ extern int i915_max_ioctl; 
extern int i915_suspend_switcheroo(struct drm_device *dev, pm_message_t state);

extern int i915_resume_switcheroo(struct drm_device *dev);



int intel_sanitize_enable_ppgtt(struct drm_device *dev, int enable_ppgtt);



/* i915_dma.c */

void __printf(3, 4)

__i915_printk(struct drm_i915_private *dev_priv, const char *level,

drivers/gpu/drm/i915/i915_gem.c

+0 −3
Original line number Diff line number Diff line
@@ -4904,9 +4904,6 @@ int i915_gem_init(struct drm_device *dev) 
	struct drm_i915_private *dev_priv = dev->dev_private;

	int ret;



	i915.enable_execlists = intel_sanitize_enable_execlists(dev,

			i915.enable_execlists);



	mutex_lock(&dev->struct_mutex);



	if (!i915.enable_execlists) {

drivers/gpu/drm/i915/i915_gem_gtt.c

+5 −11
Original line number Diff line number Diff line
@@ -110,7 +110,7 @@ const struct i915_ggtt_view i915_ggtt_view_rotated = { 
	.type = I915_GGTT_VIEW_ROTATED,

};



static int sanitize_enable_ppgtt(struct drm_device *dev, int enable_ppgtt)

int intel_sanitize_enable_ppgtt(struct drm_device *dev, int enable_ppgtt)

{

	bool has_aliasing_ppgtt;

	bool has_full_ppgtt;
@@ -123,12 +123,14 @@ static int sanitize_enable_ppgtt(struct drm_device *dev, int enable_ppgtt) 
	if (intel_vgpu_active(dev))

		has_full_ppgtt = false; /* emulation is too hard */



	if (!has_aliasing_ppgtt)

		return 0;



	/*

	 * We don't allow disabling PPGTT for gen9+ as it's a requirement for

	 * execlists, the sole mechanism available to submit work.

	 */

	if (INTEL_INFO(dev)->gen < 9 &&

	    (enable_ppgtt == 0 || !has_aliasing_ppgtt))

	if (enable_ppgtt == 0 && INTEL_INFO(dev)->gen < 9)

		return 0;



	if (enable_ppgtt == 1)
@@ -3219,14 +3221,6 @@ int i915_ggtt_init_hw(struct drm_device *dev) 
	if (intel_iommu_gfx_mapped)

		DRM_INFO("VT-d active for gfx access\n");

#endif

	/*

	 * i915.enable_ppgtt is read-only, so do an early pass to validate the

	 * user's requested state against the hardware/driver capabilities.  We

	 * do this now so that we can print out any log messages once rather

	 * than every time we check intel_enable_ppgtt().

	 */

	i915.enable_ppgtt = sanitize_enable_ppgtt(dev, i915.enable_ppgtt);

	DRM_DEBUG_DRIVER("ppgtt mode: %i\n", i915.enable_ppgtt);



	return 0;

drivers/gpu/drm/i915/intel_lrc.c

+0 −2
Original line number Diff line number Diff line
@@ -248,8 +248,6 @@ static int intel_lr_context_pin(struct intel_context *ctx, 
 */

int intel_sanitize_enable_execlists(struct drm_device *dev, int enable_execlists)

{

	WARN_ON(i915.enable_ppgtt == -1);



	/* On platforms with execlist available, vGPU will only

	 * support execlist mode, no ring buffer mode.

	 */