Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 0d859a6a authored by Antoine Tenart's avatar Antoine Tenart Committed by Sebastian Hesselbarth
Browse files

ARM: dts: berlin: add the SDHCI nodes for the BG2Q 



Add the SDHCI nodes for the Marvell Berlin BG2Q, using the mrvl,pxav3-mmc
driver.

Signed-off-by: default avatarAntoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: default avatarSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
parent 50cc24ff

arch/arm/boot/dts/berlin2q.dtsi

+24 −0
Original line number Original line Diff line number Diff line
@@ -62,6 +62,30 @@ 
		ranges = <0 0xf7000000 0x1000000>;

		ranges = <0 0xf7000000 0x1000000>;

		interrupt-parent = <&gic>;

		interrupt-parent = <&gic>;





		sdhci0: sdhci@ab0000 {

			compatible = "mrvl,pxav3-mmc";

			reg = <0xab0000 0x200>;

			clocks = <&chip CLKID_SDIO1XIN>;

			interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;

			status = "disabled";

		};



		sdhci1: sdhci@ab0800 {

			compatible = "mrvl,pxav3-mmc";

			reg = <0xab0800 0x200>;

			clocks = <&chip CLKID_SDIO1XIN>;

			interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;

			status = "disabled";

		};



		sdhci2: sdhci@ab1000 {

			compatible = "mrvl,pxav3-mmc";

			reg = <0xab1000 0x200>;

			interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&chip CLKID_SDIO1XIN>;

			status = "disabled";

		};



		l2: l2-cache-controller@ac0000 {

		l2: l2-cache-controller@ac0000 {

			compatible = "arm,pl310-cache";

			compatible = "arm,pl310-cache";

			reg = <0xac0000 0x1000>;

			reg = <0xac0000 0x1000>;