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Commit 0cfd5267 authored by Yoichi Yuasa's avatar Yoichi Yuasa Committed by Ralf Baechle
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[MIPS] Cobalt: Fix UART I/O type 



The Cobalt UART is actually connected to memory resource area.

Signed-off-by: default avatarYoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent e03b5269

arch/mips/cobalt/setup.c

+7 −7
Original line number Diff line number Diff line
@@ -130,7 +130,7 @@ void __init plat_mem_setup(void) 


	set_io_port_base(CKSEG1ADDR(GT_DEF_PCI0_IO_BASE));



	/* I/O port resource must include UART and LCD/buttons */

	/* I/O port resource must include LCD/buttons */

	ioport_resource.end = 0x0fffffff;



	/* request I/O space for devices used on all i[345]86 PCs */
@@ -149,25 +149,25 @@ void __init plat_mem_setup(void) 
	register_pci_controller(&cobalt_pci_controller);

#endif



#ifdef CONFIG_SERIAL_8250

	if (cobalt_board_id > COBALT_BRD_ID_RAQ1) {



#ifdef CONFIG_EARLY_PRINTK

		cobalt_early_console();

#endif



#ifdef CONFIG_SERIAL_8250

		uart.line	= 0;

		uart.type	= PORT_UNKNOWN;

		uart.uartclk	= 18432000;

		uart.irq	= COBALT_SERIAL_IRQ;

		uart.flags	= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST;

		uart.iobase	= 0xc800000;

		uart.iotype	= UPIO_PORT;

		uart.flags	= UPF_IOREMAP | UPF_BOOT_AUTOCONF |

				  UPF_SKIP_TEST;

		uart.iotype	= UPIO_MEM;

		uart.mapbase	= 0x1c800000;



		early_serial_setup(&uart);

	}

#endif

	}

}



/*

 * Prom init. We read our one and only communication with the firmware.