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Commit 0c02cf2f authored by Heiko Stübner's avatar Heiko Stübner Committed by Mike Turquette
Browse files

clk: composite: allow read-only clocks 



This allows readl-only composite clocks by making mux_ops->set_parent and
divider_ops->round_rate/set_rate optional.

Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
Acked-By: default avatarMax Schwarz <max.schwarz@online.de>
Tested-By: default avatarMax Schwarz <max.schwarz@online.de>
Signed-off-by: default avatarMike Turquette <mturquette@linaro.org>
parent 3eb635f1

drivers/clk/clk-composite.c

+3 −6
Original line number Diff line number Diff line
@@ -207,7 +207,7 @@ struct clk *clk_register_composite(struct device *dev, const char *name, 
	clk_composite_ops = &composite->ops;



	if (mux_hw && mux_ops) {

		if (!mux_ops->get_parent || !mux_ops->set_parent) {

		if (!mux_ops->get_parent) {

			clk = ERR_PTR(-EINVAL);

			goto err;

		}
@@ -215,6 +215,7 @@ struct clk *clk_register_composite(struct device *dev, const char *name, 
		composite->mux_hw = mux_hw;

		composite->mux_ops = mux_ops;

		clk_composite_ops->get_parent = clk_composite_get_parent;

		if (mux_ops->set_parent)

			clk_composite_ops->set_parent = clk_composite_set_parent;

		if (mux_ops->determine_rate)

			clk_composite_ops->determine_rate = clk_composite_determine_rate;
@@ -232,10 +233,6 @@ struct clk *clk_register_composite(struct device *dev, const char *name, 
			if (rate_ops->set_rate) {

				clk_composite_ops->set_rate = clk_composite_set_rate;

			}

		} else {

			WARN(rate_ops->set_rate,

				"%s: missing round_rate op is required\n",

				__func__);

		}



		composite->rate_hw = rate_hw;