Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 0bfb8244 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'drm-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6 

* 'drm-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6:
  drm/radeon: Fix sparc regression in r300_scratch()
  drm: make sure vblank interrupts are disabled at DPMS time
  drm/radeon/kms/evergreen: No EnableYUV table
  drm/radeon: 9800 SE has only one quadpipe
  drm/radeon/kms: don't print error for legal crtcs.
  drm/radeon/kms/evergreen: fix LUT setup
parents b91ce4d1 88b04507

drivers/gpu/drm/drm_irq.c

+1 −0
Original line number Diff line number Diff line
@@ -476,6 +476,7 @@ void drm_vblank_off(struct drm_device *dev, int crtc) 
	unsigned long irqflags;



	spin_lock_irqsave(&dev->vbl_lock, irqflags);

	dev->driver->disable_vblank(dev, crtc);

	DRM_WAKEUP(&dev->vbl_queue[crtc]);

	dev->vblank_enabled[crtc] = 0;

	dev->last_vblank[crtc] = dev->driver->get_vblank_counter(dev, crtc);

drivers/gpu/drm/radeon/r300.c

+2 −3
Original line number Diff line number Diff line
@@ -324,13 +324,12 @@ void r300_gpu_init(struct radeon_device *rdev) 
	uint32_t gb_tile_config, tmp;



	r100_hdp_reset(rdev);

	/* FIXME: rv380 one pipes ? */

	if ((rdev->family == CHIP_R300 && rdev->pdev->device != 0x4144) ||

	    (rdev->family == CHIP_R350)) {

	    (rdev->family == CHIP_R350 && rdev->pdev->device != 0x4148)) {

		/* r300,r350 */

		rdev->num_gb_pipes = 2;

	} else {

		/* rv350,rv370,rv380,r300 AD */

		/* rv350,rv370,rv380,r300 AD, r350 AH */

		rdev->num_gb_pipes = 1;

	}

	rdev->num_z_pipes = 1;

drivers/gpu/drm/radeon/r300_cmdbuf.c

+1 −1
Original line number Diff line number Diff line
@@ -921,7 +921,7 @@ static int r300_scratch(drm_radeon_private_t *dev_priv, 


	ptr_addr = drm_buffer_read_object(cmdbuf->buffer,

			sizeof(stack_ptr_addr), &stack_ptr_addr);

	ref_age_base = (u32 *)(unsigned long)*ptr_addr;

	ref_age_base = (u32 *)(unsigned long)get_unaligned(ptr_addr);



	for (i=0; i < header.scratch.n_bufs; i++) {

		buf_idx = drm_buffer_pointer_to_dword(cmdbuf->buffer, 0);

drivers/gpu/drm/radeon/r420.c

+6 −0
Original line number Diff line number Diff line
@@ -59,6 +59,12 @@ void r420_pipes_init(struct radeon_device *rdev) 
	/* get max number of pipes */

	gb_pipe_select = RREG32(0x402C);

	num_pipes = ((gb_pipe_select >> 12) & 3) + 1;



	/* SE chips have 1 pipe */

	if ((rdev->pdev->device == 0x5e4c) ||

	    (rdev->pdev->device == 0x5e4f))

		num_pipes = 1;



	rdev->num_gb_pipes = num_pipes;

	tmp = 0;

	switch (num_pipes) {

drivers/gpu/drm/radeon/radeon_cp.c

+7 −2
Original line number Diff line number Diff line
@@ -435,14 +435,19 @@ static void radeon_init_pipes(struct drm_device *dev) 
	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R420) {

		gb_pipe_sel = RADEON_READ(R400_GB_PIPE_SELECT);

		dev_priv->num_gb_pipes = ((gb_pipe_sel >> 12) & 0x3) + 1;

		/* SE cards have 1 pipe */

		if ((dev->pdev->device == 0x5e4c) ||

		    (dev->pdev->device == 0x5e4f))

			dev_priv->num_gb_pipes = 1;

	} else {

		/* R3xx */

		if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R300 &&

		     dev->pdev->device != 0x4144) ||

		    ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R350)) {

		    ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R350 &&

		     dev->pdev->device != 0x4148)) {

			dev_priv->num_gb_pipes = 2;

		} else {

			/* RV3xx/R300 AD */

			/* RV3xx/R300 AD/R350 AH */

			dev_priv->num_gb_pipes = 1;

		}

	}