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Commit 09c0ed2e authored by Saeed Bishara's avatar Saeed Bishara Committed by Lennert Buytenhek
Browse files

[ARM] Kirkwood: Instantiate mv_xor driver 



Signed-off-by: default avatarSaeed Bishara <saeed@marvell.com>
Signed-off-by: default avatarLennert Buytenhek <buytenh@marvell.com>
parent 1d5a1a6e

arch/arm/mach-kirkwood/common.c

+207 −0
Original line number Diff line number Diff line
@@ -22,6 +22,7 @@ 
#include <mach/kirkwood.h>

#include <plat/cache-feroceon-l2.h>

#include <plat/ehci-orion.h>

#include <plat/mv_xor.h>

#include <plat/orion_nand.h>

#include <plat/time.h>

#include "common.h"
@@ -283,6 +284,212 @@ void __init kirkwood_uart1_init(void) 
}





/*****************************************************************************

 * XOR

 ****************************************************************************/

static struct mv_xor_platform_shared_data kirkwood_xor_shared_data = {

	.dram		= &kirkwood_mbus_dram_info,

};



static u64 kirkwood_xor_dmamask = DMA_32BIT_MASK;





/*****************************************************************************

 * XOR0

 ****************************************************************************/

static struct resource kirkwood_xor0_shared_resources[] = {

	{

		.name	= "xor 0 low",

		.start	= XOR0_PHYS_BASE,

		.end	= XOR0_PHYS_BASE + 0xff,

		.flags	= IORESOURCE_MEM,

	}, {

		.name	= "xor 0 high",

		.start	= XOR0_HIGH_PHYS_BASE,

		.end	= XOR0_HIGH_PHYS_BASE + 0xff,

		.flags	= IORESOURCE_MEM,

	},

};



static struct platform_device kirkwood_xor0_shared = {

	.name		= MV_XOR_SHARED_NAME,

	.id		= 0,

	.dev		= {

		.platform_data = &kirkwood_xor_shared_data,

	},

	.num_resources	= ARRAY_SIZE(kirkwood_xor0_shared_resources),

	.resource	= kirkwood_xor0_shared_resources,

};



static struct resource kirkwood_xor00_resources[] = {

	[0] = {

		.start	= IRQ_KIRKWOOD_XOR_00,

		.end	= IRQ_KIRKWOOD_XOR_00,

		.flags	= IORESOURCE_IRQ,

	},

};



static struct mv_xor_platform_data kirkwood_xor00_data = {

	.shared		= &kirkwood_xor0_shared,

	.hw_id		= 0,

	.pool_size	= PAGE_SIZE,

};



static struct platform_device kirkwood_xor00_channel = {

	.name		= MV_XOR_NAME,

	.id		= 0,

	.num_resources	= ARRAY_SIZE(kirkwood_xor00_resources),

	.resource	= kirkwood_xor00_resources,

	.dev		= {

		.dma_mask		= &kirkwood_xor_dmamask,

		.coherent_dma_mask	= DMA_64BIT_MASK,

		.platform_data		= (void *)&kirkwood_xor00_data,

	},

};



static struct resource kirkwood_xor01_resources[] = {

	[0] = {

		.start	= IRQ_KIRKWOOD_XOR_01,

		.end	= IRQ_KIRKWOOD_XOR_01,

		.flags	= IORESOURCE_IRQ,

	},

};



static struct mv_xor_platform_data kirkwood_xor01_data = {

	.shared		= &kirkwood_xor0_shared,

	.hw_id		= 1,

	.pool_size	= PAGE_SIZE,

};



static struct platform_device kirkwood_xor01_channel = {

	.name		= MV_XOR_NAME,

	.id		= 1,

	.num_resources	= ARRAY_SIZE(kirkwood_xor01_resources),

	.resource	= kirkwood_xor01_resources,

	.dev		= {

		.dma_mask		= &kirkwood_xor_dmamask,

		.coherent_dma_mask	= DMA_64BIT_MASK,

		.platform_data		= (void *)&kirkwood_xor01_data,

	},

};



void __init kirkwood_xor0_init(void)

{

	platform_device_register(&kirkwood_xor0_shared);



	/*

	 * two engines can't do memset simultaneously, this limitation

	 * satisfied by removing memset support from one of the engines.

	 */

	dma_cap_set(DMA_MEMCPY, kirkwood_xor00_data.cap_mask);

	dma_cap_set(DMA_XOR, kirkwood_xor00_data.cap_mask);

	platform_device_register(&kirkwood_xor00_channel);



	dma_cap_set(DMA_MEMCPY, kirkwood_xor01_data.cap_mask);

	dma_cap_set(DMA_MEMSET, kirkwood_xor01_data.cap_mask);

	dma_cap_set(DMA_XOR, kirkwood_xor01_data.cap_mask);

	platform_device_register(&kirkwood_xor01_channel);

}





/*****************************************************************************

 * XOR1

 ****************************************************************************/

static struct resource kirkwood_xor1_shared_resources[] = {

	{

		.name	= "xor 1 low",

		.start	= XOR1_PHYS_BASE,

		.end	= XOR1_PHYS_BASE + 0xff,

		.flags	= IORESOURCE_MEM,

	}, {

		.name	= "xor 1 high",

		.start	= XOR1_HIGH_PHYS_BASE,

		.end	= XOR1_HIGH_PHYS_BASE + 0xff,

		.flags	= IORESOURCE_MEM,

	},

};



static struct platform_device kirkwood_xor1_shared = {

	.name		= MV_XOR_SHARED_NAME,

	.id		= 1,

	.dev		= {

		.platform_data = &kirkwood_xor_shared_data,

	},

	.num_resources	= ARRAY_SIZE(kirkwood_xor1_shared_resources),

	.resource	= kirkwood_xor1_shared_resources,

};



static struct resource kirkwood_xor10_resources[] = {

	[0] = {

		.start	= IRQ_KIRKWOOD_XOR_10,

		.end	= IRQ_KIRKWOOD_XOR_10,

		.flags	= IORESOURCE_IRQ,

	},

};



static struct mv_xor_platform_data kirkwood_xor10_data = {

	.shared		= &kirkwood_xor1_shared,

	.hw_id		= 0,

	.pool_size	= PAGE_SIZE,

};



static struct platform_device kirkwood_xor10_channel = {

	.name		= MV_XOR_NAME,

	.id		= 2,

	.num_resources	= ARRAY_SIZE(kirkwood_xor10_resources),

	.resource	= kirkwood_xor10_resources,

	.dev		= {

		.dma_mask		= &kirkwood_xor_dmamask,

		.coherent_dma_mask	= DMA_64BIT_MASK,

		.platform_data		= (void *)&kirkwood_xor10_data,

	},

};



static struct resource kirkwood_xor11_resources[] = {

	[0] = {

		.start	= IRQ_KIRKWOOD_XOR_11,

		.end	= IRQ_KIRKWOOD_XOR_11,

		.flags	= IORESOURCE_IRQ,

	},

};



static struct mv_xor_platform_data kirkwood_xor11_data = {

	.shared		= &kirkwood_xor1_shared,

	.hw_id		= 1,

	.pool_size	= PAGE_SIZE,

};



static struct platform_device kirkwood_xor11_channel = {

	.name		= MV_XOR_NAME,

	.id		= 3,

	.num_resources	= ARRAY_SIZE(kirkwood_xor11_resources),

	.resource	= kirkwood_xor11_resources,

	.dev		= {

		.dma_mask		= &kirkwood_xor_dmamask,

		.coherent_dma_mask	= DMA_64BIT_MASK,

		.platform_data		= (void *)&kirkwood_xor11_data,

	},

};



void __init kirkwood_xor1_init(void)

{

	platform_device_register(&kirkwood_xor1_shared);



	/*

	 * two engines can't do memset simultaneously, this limitation

	 * satisfied by removing memset support from one of the engines.

	 */

	dma_cap_set(DMA_MEMCPY, kirkwood_xor10_data.cap_mask);

	dma_cap_set(DMA_XOR, kirkwood_xor10_data.cap_mask);

	platform_device_register(&kirkwood_xor10_channel);



	dma_cap_set(DMA_MEMCPY, kirkwood_xor11_data.cap_mask);

	dma_cap_set(DMA_MEMSET, kirkwood_xor11_data.cap_mask);

	dma_cap_set(DMA_XOR, kirkwood_xor11_data.cap_mask);

	platform_device_register(&kirkwood_xor11_channel);

}





/*****************************************************************************

 * Time handling

 ****************************************************************************/

arch/arm/mach-kirkwood/common.h

+2 −0
Original line number Diff line number Diff line
@@ -35,6 +35,8 @@ void kirkwood_rtc_init(void); 
void kirkwood_sata_init(struct mv_sata_platform_data *sata_data);

void kirkwood_uart0_init(void);

void kirkwood_uart1_init(void);

void kirkwood_xor0_init(void);

void kirkwood_xor1_init(void);



extern struct sys_timer kirkwood_timer;

arch/arm/mach-kirkwood/include/mach/kirkwood.h

+9 −0
Original line number Diff line number Diff line
@@ -88,6 +88,15 @@ 


#define USB_PHYS_BASE		(KIRKWOOD_REGS_PHYS_BASE | 0x50000)



#define XOR0_PHYS_BASE		(KIRKWOOD_REGS_PHYS_BASE | 0x60800)

#define XOR0_VIRT_BASE		(KIRKWOOD_REGS_VIRT_BASE | 0x60800)

#define XOR1_PHYS_BASE		(KIRKWOOD_REGS_PHYS_BASE | 0x60900)

#define XOR1_VIRT_BASE		(KIRKWOOD_REGS_VIRT_BASE | 0x60900)

#define XOR0_HIGH_PHYS_BASE	(KIRKWOOD_REGS_PHYS_BASE | 0x60A00)

#define XOR0_HIGH_VIRT_BASE	(KIRKWOOD_REGS_VIRT_BASE | 0x60A00)

#define XOR1_HIGH_PHYS_BASE	(KIRKWOOD_REGS_PHYS_BASE | 0x60B00)

#define XOR1_HIGH_VIRT_BASE	(KIRKWOOD_REGS_VIRT_BASE | 0x60B00)



#define GE00_PHYS_BASE		(KIRKWOOD_REGS_PHYS_BASE | 0x70000)

#define GE01_PHYS_BASE		(KIRKWOOD_REGS_PHYS_BASE | 0x74000)

arch/arm/mach-kirkwood/rd88f6192-nas-setup.c

+2 −0
Original line number Diff line number Diff line
@@ -46,6 +46,8 @@ static void __init rd88f6192_init(void) 
	kirkwood_rtc_init();

	kirkwood_sata_init(&rd88f6192_sata_data);

	kirkwood_uart0_init();

	kirkwood_xor0_init();

	kirkwood_xor1_init();

}



static int __init rd88f6192_pci_init(void)