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Commit 06a4f429 authored by Moshe Green's avatar Moshe Green Committed by Greg Kroah-Hartman
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staging: sm750fb: rename getChipType to sm750_get_chip_type



Rename CamelCased function getChipType to sm750_get_chip_type
(prefex with sm750 in order to make the context of
the function clear).

This issue was found by checkpatch.pl

Signed-off-by: default avatarMoshe Green <mgmoshes@gmail.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 3d44a78f
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+8 −8
Original line number Diff line number Diff line
@@ -10,7 +10,7 @@
#define roundedDiv(num, denom)	((2 * (num) + (denom)) / (2 * (denom)))
#define MHz(x) ((x) * 1000000)

logical_chip_type_t getChipType(void)
logical_chip_type_t sm750_get_chip_type(void)
{
	unsigned short physicalID;
	char physicalRev;
@@ -37,7 +37,7 @@ static unsigned int get_mxclk_freq(void)
	unsigned int pll_reg;
	unsigned int M, N, OD, POD;

	if (getChipType() == SM750LE)
	if (sm750_get_chip_type() == SM750LE)
		return MHz(130);

	pll_reg = PEEK32(MXCLK_PLL_CTRL);
@@ -60,7 +60,7 @@ static void setChipClock(unsigned int frequency)
	unsigned int ulActualMxClk;

	/* Cheok_0509: For SM750LE, the chip clock is fixed. Nothing to set. */
	if (getChipType() == SM750LE)
	if (sm750_get_chip_type() == SM750LE)
		return;

	if (frequency) {
@@ -90,7 +90,7 @@ static void setMemoryClock(unsigned int frequency)
	/* Cheok_0509: For SM750LE, the memory clock is fixed.
	 * Nothing to set.
	 */
	if (getChipType() == SM750LE)
	if (sm750_get_chip_type() == SM750LE)
		return;

	if (frequency) {
@@ -141,7 +141,7 @@ static void setMasterClock(unsigned int frequency)
	/* Cheok_0509: For SM750LE, the memory clock is fixed.
	 * Nothing to set.
	 */
	if (getChipType() == SM750LE)
	if (sm750_get_chip_type() == SM750LE)
		return;

	if (frequency) {
@@ -182,7 +182,7 @@ unsigned int ddk750_getVMSize(void)
	unsigned int data;

	/* sm750le only use 64 mb memory*/
	if (getChipType() == SM750LE)
	if (sm750_get_chip_type() == SM750LE)
		return SZ_64M;

	/* for 750,always use power mode0*/
@@ -221,7 +221,7 @@ int ddk750_initHw(initchip_param_t *pInitParam)
	reg |= (CURRENT_GATE_DISPLAY | CURRENT_GATE_LOCALMEM);
	setCurrentGate(reg);

	if (getChipType() != SM750LE) {
	if (sm750_get_chip_type() != SM750LE) {
		/*	set panel pll and graphic mode via mmio_88 */
		reg = PEEK32(VGA_CONFIGURATION);
		reg |= (VGA_CONFIGURATION_PLL | VGA_CONFIGURATION_MODE);
@@ -320,7 +320,7 @@ unsigned int calcPllValue(unsigned int request_orig, pll_value_t *pll)
	const int max_OD = 3;
	int max_d = 6;

	if (getChipType() == SM750LE) {
	if (sm750_get_chip_type() == SM750LE) {
		/* SM750LE don't have
		 * programmable PLL and M/N values to work on.
		 * Just return the requested clock.
+1 −1
Original line number Diff line number Diff line
@@ -69,7 +69,7 @@ typedef struct _initchip_param_t {
}
initchip_param_t;

logical_chip_type_t getChipType(void);
logical_chip_type_t sm750_get_chip_type(void);
unsigned int calcPllValue(unsigned int request, pll_value_t *pll);
unsigned int formatPllReg(pll_value_t *pPLL);
void ddk750_set_mmio(void __iomem *, unsigned short, char);
+2 −2
Original line number Diff line number Diff line
@@ -117,7 +117,7 @@ static int programModeRegisters(mode_parameter_t *pModeParam, pll_value_t *pll)
		if (pModeParam->horizontal_sync_polarity)
			tmp |= DISPLAY_CTRL_HSYNC_PHASE;

		if (getChipType() == SM750LE) {
		if (sm750_get_chip_type() == SM750LE) {
			displayControlAdjust_SM750LE(pModeParam, tmp);
		} else {
			reg = PEEK32(CRT_DISPLAY_CTRL) &
@@ -209,7 +209,7 @@ int ddk750_setModeTiming(mode_parameter_t *parm, clock_type_t clock)
	pll.clockType = clock;

	uiActualPixelClk = calcPllValue(parm->pixel_clock, &pll);
	if (getChipType() == SM750LE) {
	if (sm750_get_chip_type() == SM750LE) {
		/* set graphic mode via IO method */
		outb_p(0x88, 0x3d4);
		outb_p(0x06, 0x3d5);
+3 −3
Original line number Diff line number Diff line
@@ -6,7 +6,7 @@ void ddk750_setDPMS(DPMS_t state)
{
	unsigned int value;

	if (getChipType() == SM750LE) {
	if (sm750_get_chip_type() == SM750LE) {
		value = PEEK32(CRT_DISPLAY_CTRL) & ~CRT_DISPLAY_CTRL_DPMS_MASK;
		value |= (state << CRT_DISPLAY_CTRL_DPMS_SHIFT);
		POKE32(CRT_DISPLAY_CTRL, value);
@@ -19,7 +19,7 @@ void ddk750_setDPMS(DPMS_t state)

static unsigned int getPowerMode(void)
{
	if (getChipType() == SM750LE)
	if (sm750_get_chip_type() == SM750LE)
		return 0;
	return PEEK32(POWER_MODE_CTRL) & POWER_MODE_CTRL_MODE_MASK;
}
@@ -35,7 +35,7 @@ void setPowerMode(unsigned int powerMode)

	control_value = PEEK32(POWER_MODE_CTRL) & ~POWER_MODE_CTRL_MODE_MASK;

	if (getChipType() == SM750LE)
	if (sm750_get_chip_type() == SM750LE)
		return;

	switch (powerMode) {
+1 −1
Original line number Diff line number Diff line
@@ -403,7 +403,7 @@ long sm750_sw_i2c_init(
	if ((clk_gpio > 31) || (data_gpio > 31))
		return -1;

	if (getChipType() == SM750LE)
	if (sm750_get_chip_type() == SM750LE)
		return sm750le_i2c_init(clk_gpio, data_gpio);

	/* Initialize the GPIO pin for the i2c Clock Register */
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