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Commit 069efc1d authored by Chris Wilson's avatar Chris Wilson
Browse files

drm/i915: Clear fence registers on GPU reset 



When the GPU is reset, the fence registers are invalidated, so release
the objects and clear them out.

Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
parent 812ed492

drivers/gpu/drm/i915/i915_drv.c

+1 −1
Original line number Original line Diff line number Diff line
@@ -395,7 +395,7 @@ int i915_reset(struct drm_device *dev, u8 flags) 




	mutex_lock(&dev->struct_mutex);

	mutex_lock(&dev->struct_mutex);





	i915_gem_reset_lists(dev);

	i915_gem_reset(dev);





	/*

	/*

	 * Set the domains we want to reset (GRDOM/bits 2 and 3) as

	 * Set the domains we want to reset (GRDOM/bits 2 and 3) as

drivers/gpu/drm/i915/i915_drv.h

+1 −1
Original line number Original line Diff line number Diff line
@@ -1033,7 +1033,7 @@ int i915_gem_object_get_fence_reg(struct drm_gem_object *obj, 
int i915_gem_object_put_fence_reg(struct drm_gem_object *obj,

int i915_gem_object_put_fence_reg(struct drm_gem_object *obj,

				  bool interruptible);

				  bool interruptible);

void i915_gem_retire_requests(struct drm_device *dev);

void i915_gem_retire_requests(struct drm_device *dev);

void i915_gem_reset_lists(struct drm_device *dev);

void i915_gem_reset(struct drm_device *dev);

void i915_gem_clflush_object(struct drm_gem_object *obj);

void i915_gem_clflush_object(struct drm_gem_object *obj);

int i915_gem_object_set_domain(struct drm_gem_object *obj,

int i915_gem_object_set_domain(struct drm_gem_object *obj,

			       uint32_t read_domains,

			       uint32_t read_domains,

drivers/gpu/drm/i915/i915_gem.c

+13 −1
Original line number Original line Diff line number Diff line
@@ -1826,10 +1826,11 @@ static void i915_gem_reset_ring_lists(struct drm_i915_private *dev_priv, 
	}

	}

}

}





void i915_gem_reset_lists(struct drm_device *dev)

void i915_gem_reset(struct drm_device *dev)

{

{

	struct drm_i915_private *dev_priv = dev->dev_private;

	struct drm_i915_private *dev_priv = dev->dev_private;

	struct drm_i915_gem_object *obj_priv;

	struct drm_i915_gem_object *obj_priv;

	int i;





	i915_gem_reset_ring_lists(dev_priv, &dev_priv->render_ring);

	i915_gem_reset_ring_lists(dev_priv, &dev_priv->render_ring);

	if (HAS_BSD(dev))

	if (HAS_BSD(dev))
@@ -1858,6 +1859,17 @@ void i915_gem_reset_lists(struct drm_device *dev) 
	{

	{

		obj_priv->base.read_domains &= ~I915_GEM_GPU_DOMAINS;

		obj_priv->base.read_domains &= ~I915_GEM_GPU_DOMAINS;

	}

	}



	/* The fence registers are invalidated so clear them out */

	for (i = 0; i < 16; i++) {

		struct drm_i915_fence_reg *reg;



		reg = &dev_priv->fence_regs[i];

		if (!reg->obj)

			continue;



		i915_gem_clear_fence_reg(reg->obj);

	}

}

}





/**

/**