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Commit 05053d7a authored by Marek Szyprowski's avatar Marek Szyprowski Committed by Krzysztof Kozlowski
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ARM: dts: Add GSCL block parent clock management to pm domain on exynos542x 



Add support for restoring GScaler parent clocks configuration when GSCL
power domain is turned on.

Signed-off-by: default avatarMarek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: default avatarKrzysztof Kozlowski <k.kozlowski@samsung.com>
parent 4869710c

arch/arm/boot/dts/exynos5420.dtsi

+4 −2
Original line number Diff line number Diff line
@@ -298,8 +298,10 @@ 
		compatible = "samsung,exynos4210-pd";

		reg = <0x10044000 0x20>;

		#power-domain-cells = <0>;

		clocks = <&clock CLK_GSCL0>, <&clock CLK_GSCL1>;

		clock-names = "asb0", "asb1";

		clocks = <&clock CLK_FIN_PLL>,

			 <&clock CLK_MOUT_USER_ACLK300_GSCL>,

			 <&clock CLK_GSCL0>, <&clock CLK_GSCL1>;

		clock-names = "oscclk", "clk0", "asb0", "asb1";

	};



	isp_pd: power-domain@10044020 {