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Commit 042446a3 authored by Suzuki K Poulose's avatar Suzuki K Poulose Committed by Will Deacon
Browse files

arm64: cpufeature: Track 32bit EL0 support 



Add cpu_hwcap bit for keeping track of the support for 32bit EL0.

Tested-by: default avatarYury Norov <ynorov@caviumnetworks.com>
Signed-off-by: default avatarSuzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
parent a6dc3cd7

arch/arm64/include/asm/cpufeature.h

+7 −1
Original line number Diff line number Diff line
@@ -35,8 +35,9 @@ 
#define ARM64_ALT_PAN_NOT_UAO			10

#define ARM64_HAS_VIRT_HOST_EXTN		11

#define ARM64_WORKAROUND_CAVIUM_27456		12

#define ARM64_HAS_32BIT_EL0			13



#define ARM64_NCAPS				13

#define ARM64_NCAPS				14



#ifndef __ASSEMBLY__
@@ -192,6 +193,11 @@ static inline bool cpu_supports_mixed_endian_el0(void) 
	return id_aa64mmfr0_mixed_endian_el0(read_cpuid(ID_AA64MMFR0_EL1));

}



static inline bool system_supports_32bit_el0(void)

{

	return cpus_have_cap(ARM64_HAS_32BIT_EL0);

}



static inline bool system_supports_mixed_endian_el0(void)

{

	return id_aa64mmfr0_mixed_endian_el0(read_system_reg(SYS_ID_AA64MMFR0_EL1));

arch/arm64/kernel/cpufeature.c

+9 −0
Original line number Diff line number Diff line
@@ -737,6 +737,15 @@ static const struct arm64_cpu_capabilities arm64_features[] = { 
		.capability = ARM64_HAS_VIRT_HOST_EXTN,

		.matches = runs_at_el2,

	},

	{

		.desc = "32-bit EL0 Support",

		.capability = ARM64_HAS_32BIT_EL0,

		.matches = has_cpuid_feature,

		.sys_reg = SYS_ID_AA64PFR0_EL1,

		.sign = FTR_UNSIGNED,

		.field_pos = ID_AA64PFR0_EL0_SHIFT,

		.min_field_value = ID_AA64PFR0_EL0_32BIT_64BIT,

	},

	{},

};