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Commit 037d2405 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'timers-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull timer fixes from Thomas Gleixner:
 "A few updates for timers & co:

   - prevent a livelock in the timekeeping code when debugging is
     enabled

   - prevent out of bounds access in the timekeeping debug code

   - various fixes in clocksource drivers

   - a new maintainers entry"

* 'timers-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  clocksource/drivers/sun4i: Clear interrupts after stopping timer in probe function
  drivers/clocksource/pistachio: Fix memory corruption in init
  clocksource/drivers/timer-atmel-pit: Enable mck clock
  clocksource/drivers/pxa: Fix include files for compilation
  MAINTAINERS: Add ARM ARCHITECTED TIMER entry
  timekeeping: Cap array access in timekeeping_debug
  timekeeping: Avoid taking lock in NMI path with CONFIG_DEBUG_TIMEKEEPING
parents af56ff27 b53e7d00
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+9 −0
Original line number Diff line number Diff line
@@ -881,6 +881,15 @@ S: Supported
F:	drivers/gpu/drm/arc/
F:	Documentation/devicetree/bindings/display/snps,arcpgu.txt

ARM ARCHITECTED TIMER DRIVER
M:	Mark Rutland <mark.rutland@arm.com>
M:	Marc Zyngier <marc.zyngier@arm.com>
L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S:	Maintained
F:	arch/arm/include/asm/arch_timer.h
F:	arch/arm64/include/asm/arch_timer.h
F:	drivers/clocksource/arm_arch_timer.c

ARM HDLCD DRM DRIVER
M:	Liviu Dudau <liviu.dudau@arm.com>
S:	Supported
+2 −0
Original line number Diff line number Diff line
@@ -21,6 +21,8 @@
#include <linux/of_irq.h>
#include <linux/sched_clock.h>

#include <clocksource/pxa.h>

#include <asm/div64.h>

#define OSMR0		0x00	/* OS Timer 0 Match Register */
+8 −1
Original line number Diff line number Diff line
@@ -123,12 +123,16 @@ static struct clock_event_device sun4i_clockevent = {
	.set_next_event = sun4i_clkevt_next_event,
};

static void sun4i_timer_clear_interrupt(void)
{
	writel(TIMER_IRQ_EN(0), timer_base + TIMER_IRQ_ST_REG);
}

static irqreturn_t sun4i_timer_interrupt(int irq, void *dev_id)
{
	struct clock_event_device *evt = (struct clock_event_device *)dev_id;

	writel(0x1, timer_base + TIMER_IRQ_ST_REG);
	sun4i_timer_clear_interrupt();
	evt->event_handler(evt);

	return IRQ_HANDLED;
@@ -208,6 +212,9 @@ static int __init sun4i_timer_init(struct device_node *node)
	/* Make sure timer is stopped before playing with interrupts */
	sun4i_clkevt_time_stop(0);

	/* clear timer0 interrupt */
	sun4i_timer_clear_interrupt();

	sun4i_clockevent.cpumask = cpu_possible_mask;
	sun4i_clockevent.irq = irq;

+4 −4
Original line number Diff line number Diff line
@@ -202,10 +202,10 @@ static int __init pistachio_clksrc_of_init(struct device_node *node)
	rate = clk_get_rate(fast_clk);

	/* Disable irq's for clocksource usage */
	gpt_writel(&pcs_gpt.base, 0, TIMER_IRQ_MASK, 0);
	gpt_writel(&pcs_gpt.base, 0, TIMER_IRQ_MASK, 1);
	gpt_writel(&pcs_gpt.base, 0, TIMER_IRQ_MASK, 2);
	gpt_writel(&pcs_gpt.base, 0, TIMER_IRQ_MASK, 3);
	gpt_writel(pcs_gpt.base, 0, TIMER_IRQ_MASK, 0);
	gpt_writel(pcs_gpt.base, 0, TIMER_IRQ_MASK, 1);
	gpt_writel(pcs_gpt.base, 0, TIMER_IRQ_MASK, 2);
	gpt_writel(pcs_gpt.base, 0, TIMER_IRQ_MASK, 3);

	/* Enable timer block */
	writel(TIMER_ME_GLOBAL, pcs_gpt.base);
+6 −0
Original line number Diff line number Diff line
@@ -261,6 +261,12 @@ static int __init at91sam926x_pit_dt_init(struct device_node *node)
		return PTR_ERR(data->mck);
	}

	ret = clk_prepare_enable(data->mck);
	if (ret) {
		pr_err("Unable to enable mck\n");
		return ret;
	}

	/* Get the interrupts property */
	data->irq = irq_of_parse_and_map(node, 0);
	if (!data->irq) {
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