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Commit 007c7fdb authored by Olof Johansson's avatar Olof Johansson
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Merge tag 'qcom-dt-for-3.18' of...

Merge tag 'qcom-dt-for-3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom into next/dt

Merge "qcom DT changes for v3.18" from Kumar Gala:

Qualcomm ARM Based Device Tree Updates for v3.18

* Added APQ8084 dt support for clocks, serial, pinctrl, and IFC6540 board
* Added IPQ8064 dt support for basic SoC and AP148 board
* Added APQ8064 dt support for pinctrl, reset, SDHC, and multimedia clocks
* Added PMIC 8058 dt support on MSM8660, enables PMIC based power key,
  keypad, rtc, and vibrator
* Added PMIC 8921 dt support on MSM8960, enables PMIC based power key,
  keypad, and rtc

* tag 'qcom-dt-for-3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom

:
  ARM: DT: QCOM: apq8064: Add dma support for sdcc node
  ARM: DT: apq8064: Add sdcc support via mcci driver.
  ARM: dts: qcom: Add 8064 multimedia clock controller node
  ARM: DT: APQ8064: Add node for ps_hold function in pinctrl
  ARM: DT: APQ8064: Add pinctrl support
  ARM: dts: qcom: Add TLMM DT node for APQ8084
  ARM: dts: qcom: Add initial IFC6540 board device tree
  ARM: dts: msm: Add 8058 PMIC to ssbi bus
  ARM: dts: msm: Add 8921 PMIC to ssbi bus
  ARM: qcom: Add initial IPQ8064 SoC and AP148 device trees
  ARM: dts: qcom: Add APQ8084 serial port DT node
  ARM: dts: qcom: Add APQ8084 Global Clock Controller DT node

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 8adc36bc edb81ca3
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+2 −0
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@@ -346,7 +346,9 @@ dtb-$(CONFIG_ARCH_PRIMA2) += prima2-evb.dtb
dtb-$(CONFIG_ARCH_QCOM) += \
	qcom-apq8064-ifc6410.dtb \
	qcom-apq8074-dragonboard.dtb \
	qcom-apq8084-ifc6540.dtb \
	qcom-apq8084-mtp.dtb \
	qcom-ipq8064-ap148.dtb \
	qcom-msm8660-surf.dtb \
	qcom-msm8960-cdp.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += \
+12 −0
Original line number Diff line number Diff line
@@ -12,5 +12,17 @@
				status = "ok";
			};
		};

		amba {
			/* eMMC */
			sdcc1: sdcc@12400000 {
				status = "okay";
			};

			/* External micro SD card */
			sdcc3: sdcc@12180000 {
				status = "okay";
			};
		};
	};
};
+103 −0
Original line number Diff line number Diff line
@@ -2,7 +2,9 @@

#include "skeleton.dtsi"
#include <dt-bindings/clock/qcom,gcc-msm8960.h>
#include <dt-bindings/clock/qcom,mmcc-msm8960.h>
#include <dt-bindings/soc/qcom,gsbi.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>

/ {
	model = "Qualcomm APQ8064";
@@ -70,6 +72,27 @@
		ranges;
		compatible = "simple-bus";

		tlmm_pinmux: pinctrl@800000 {
			compatible = "qcom,apq8064-pinctrl";
			reg = <0x800000 0x4000>;

			gpio-controller;
			#gpio-cells = <2>;
			interrupt-controller;
			#interrupt-cells = <2>;
			interrupts = <0 16 IRQ_TYPE_LEVEL_HIGH>;

			pinctrl-names = "default";
			pinctrl-0 = <&ps_hold>;

			ps_hold: ps_hold {
				mux {
					pins = "gpio78";
					function = "ps_hold";
				};
			};
		};

		intc: interrupt-controller@2000000 {
			compatible = "qcom,msm-qgic2";
			interrupt-controller;
@@ -166,5 +189,85 @@
			#clock-cells = <1>;
			#reset-cells = <1>;
		};

		mmcc: clock-controller@4000000 {
			compatible = "qcom,mmcc-apq8064";
			reg = <0x4000000 0x1000>;
			#clock-cells = <1>;
			#reset-cells = <1>;
		};

		/* Temporary fixed regulator */
		vsdcc_fixed: vsdcc-regulator {
			compatible = "regulator-fixed";
			regulator-name = "SDCC Power";
			regulator-min-microvolt = <2700000>;
			regulator-max-microvolt = <2700000>;
			regulator-always-on;
		};

		sdcc1bam:dma@12402000{
			compatible = "qcom,bam-v1.3.0";
			reg = <0x12402000 0x8000>;
			interrupts = <0 98 0>;
			clocks = <&gcc SDC1_H_CLK>;
			clock-names = "bam_clk";
			#dma-cells = <1>;
			qcom,ee = <0>;
		};

		sdcc3bam:dma@12182000{
			compatible = "qcom,bam-v1.3.0";
			reg = <0x12182000 0x8000>;
			interrupts = <0 96 0>;
			clocks = <&gcc SDC3_H_CLK>;
			clock-names = "bam_clk";
			#dma-cells = <1>;
			qcom,ee = <0>;
		};

		amba {
			compatible = "arm,amba-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;
			sdcc1: sdcc@12400000 {
				status		= "disabled";
				compatible	= "arm,pl18x", "arm,primecell";
				arm,primecell-periphid = <0x00051180>;
				reg		= <0x12400000 0x2000>;
				interrupts	= <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-names	= "cmd_irq";
				clocks		= <&gcc SDC1_CLK>, <&gcc SDC1_H_CLK>;
				clock-names	= "mclk", "apb_pclk";
				bus-width	= <8>;
				max-frequency	= <96000000>;
				non-removable;
				cap-sd-highspeed;
				cap-mmc-highspeed;
				vmmc-supply = <&vsdcc_fixed>;
				dmas = <&sdcc1bam 2>, <&sdcc1bam 1>;
				dma-names = "tx", "rx";
			};

			sdcc3: sdcc@12180000 {
				compatible	= "arm,pl18x", "arm,primecell";
				arm,primecell-periphid = <0x00051180>;
				status		= "disabled";
				reg		= <0x12180000 0x2000>;
				interrupts	= <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-names	= "cmd_irq";
				clocks		= <&gcc SDC3_CLK>, <&gcc SDC3_H_CLK>;
				clock-names	= "mclk", "apb_pclk";
				bus-width	= <4>;
				cap-sd-highspeed;
				cap-mmc-highspeed;
				max-frequency	= <192000000>;
				no-1-8-v;
				vmmc-supply = <&vsdcc_fixed>;
				dmas = <&sdcc3bam 2>, <&sdcc3bam 1>;
				dma-names = "tx", "rx";
			};
		};
	};
};
+23 −0
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#include "qcom-apq8084.dtsi"

/ {
	model = "Qualcomm APQ8084/IFC6540";
	compatible = "qcom,apq8084-ifc6540", "qcom,apq8084";

	soc {
		serial@f995e000 {
			status = "okay";
		};

		sdhci@f9824900 {
			bus-width = <8>;
			non-removable;
			status = "okay";
		};

		sdhci@f98a4900 {
			cd-gpios = <&tlmm 122 GPIO_ACTIVE_LOW>;
			bus-width = <4>;
		};
	};
};
+6 −0
Original line number Diff line number Diff line
@@ -3,4 +3,10 @@
/ {
	model = "Qualcomm APQ 8084-MTP";
	compatible = "qcom,apq8084-mtp", "qcom,apq8084";

	soc {
		serial@f995e000 {
			status = "okay";
		};
	};
};
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