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Commit fb68e2f4 authored by David S. Miller's avatar David S. Miller
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John W. Linville says:

====================
Please pull this batch of fixes intended for the 3.10 stream...

Regarding the NFC bits, Samuel says:

"This is the first batch of NFC fixes for 3.10, and it contains:

- 3 fixes for the NFC MEI support:
        * We now depend on the correct Kconfig symbol.
        * We register an MEI event callback whenever we enable an NFC device,
          otherwise we fail to read anything after an enable/disable cycle.
        * We only disable an MEI device from its disable mey_phy_ops,
          preventing useless consecutive disable calls.

- An NFC Makefile cleanup, as I forgot to remove a commented out line when
  moving the LLCP code to the NFC top level directory."

As for the mac80211 bits, Johannes says:

"This time I have a fix from Stanislaw for a stupid mistake I made in the
auth/assoc timeout changes, a fix from Felix for 64-bit traffic counters
and one from Helmut for address mask handling in mac80211. I also have a
few fixes myself for four different crashes reported by a few people."

And Johannes says this about the iwlwifi bit:

"This fixes a brown paper-bag bug that we really should've caught in
review. More details in the changelog for the fix."

On top of that...

Arend van Spriel and Hante Meuleman cooperate to send a series of AP
and P2P mode fixes for brcmfmac.

Gabor Juhos corrects a register offset for AR9550, avoiding a bus
error.

Dan Carpenter provides a fixup to some dmesg output in the atmel
driver.

And, finally...

Felix Fietkau not only gives us a trio of small AR934x fixes, but
also refactors the ath9k aggregation session start/stop handling
(using the generic mac80211 support) in order to avoid a deadlock.

Please let me know if there are problems!
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 01e5b2c4 50cc1cab
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+6 −3
Original line number Original line Diff line number Diff line
@@ -68,13 +68,16 @@
#define AR9300_BASE_ADDR 0x3ff
#define AR9300_BASE_ADDR 0x3ff
#define AR9300_BASE_ADDR_512 0x1ff
#define AR9300_BASE_ADDR_512 0x1ff


#define AR9300_OTP_BASE			(AR_SREV_9340(ah) ? 0x30000 : 0x14000)
#define AR9300_OTP_BASE \
#define AR9300_OTP_STATUS		(AR_SREV_9340(ah) ? 0x30018 : 0x15f18)
		((AR_SREV_9340(ah) || AR_SREV_9550(ah)) ? 0x30000 : 0x14000)
#define AR9300_OTP_STATUS \
		((AR_SREV_9340(ah) || AR_SREV_9550(ah)) ? 0x30018 : 0x15f18)
#define AR9300_OTP_STATUS_TYPE		0x7
#define AR9300_OTP_STATUS_TYPE		0x7
#define AR9300_OTP_STATUS_VALID		0x4
#define AR9300_OTP_STATUS_VALID		0x4
#define AR9300_OTP_STATUS_ACCESS_BUSY	0x2
#define AR9300_OTP_STATUS_ACCESS_BUSY	0x2
#define AR9300_OTP_STATUS_SM_BUSY	0x1
#define AR9300_OTP_STATUS_SM_BUSY	0x1
#define AR9300_OTP_READ_DATA		(AR_SREV_9340(ah) ? 0x3001c : 0x15f1c)
#define AR9300_OTP_READ_DATA \
		((AR_SREV_9340(ah) || AR_SREV_9550(ah)) ? 0x3001c : 0x15f1c)


enum targetPowerHTRates {
enum targetPowerHTRates {
	HT_TARGET_RATE_0_8_16,
	HT_TARGET_RATE_0_8_16,
+2 −1
Original line number Original line Diff line number Diff line
@@ -334,7 +334,8 @@ static void ar9003_hw_spur_ofdm(struct ath_hw *ah,
	REG_RMW_FIELD(ah, AR_PHY_SPUR_REG,
	REG_RMW_FIELD(ah, AR_PHY_SPUR_REG,
		      AR_PHY_SPUR_REG_EN_VIT_SPUR_RSSI, 1);
		      AR_PHY_SPUR_REG_EN_VIT_SPUR_RSSI, 1);


	if (REG_READ_FIELD(ah, AR_PHY_MODE,
	if (!AR_SREV_9340(ah) &&
	    REG_READ_FIELD(ah, AR_PHY_MODE,
			   AR_PHY_MODE_DYNAMIC) == 0x1)
			   AR_PHY_MODE_DYNAMIC) == 0x1)
		REG_RMW_FIELD(ah, AR_PHY_SPUR_REG,
		REG_RMW_FIELD(ah, AR_PHY_SPUR_REG,
			      AR_PHY_SPUR_REG_ENABLE_NF_RSSI_SPUR_MIT, 1);
			      AR_PHY_SPUR_REG_ENABLE_NF_RSSI_SPUR_MIT, 1);
+4 −10
Original line number Original line Diff line number Diff line
@@ -251,10 +251,9 @@ struct ath_atx_tid {
	int tidno;
	int tidno;
	int baw_head;   /* first un-acked tx buffer */
	int baw_head;   /* first un-acked tx buffer */
	int baw_tail;   /* next unused tx buffer slot */
	int baw_tail;   /* next unused tx buffer slot */
	int sched;
	bool sched;
	int paused;
	bool paused;
	u8 state;
	bool active;
	bool stop_cb;
};
};


struct ath_node {
struct ath_node {
@@ -275,10 +274,6 @@ struct ath_node {
#endif
#endif
};
};


#define AGGR_CLEANUP         BIT(1)
#define AGGR_ADDBA_COMPLETE  BIT(2)
#define AGGR_ADDBA_PROGRESS  BIT(3)

struct ath_tx_control {
struct ath_tx_control {
	struct ath_txq *txq;
	struct ath_txq *txq;
	struct ath_node *an;
	struct ath_node *an;
@@ -352,8 +347,7 @@ void ath_tx_tasklet(struct ath_softc *sc);
void ath_tx_edma_tasklet(struct ath_softc *sc);
void ath_tx_edma_tasklet(struct ath_softc *sc);
int ath_tx_aggr_start(struct ath_softc *sc, struct ieee80211_sta *sta,
int ath_tx_aggr_start(struct ath_softc *sc, struct ieee80211_sta *sta,
		      u16 tid, u16 *ssn);
		      u16 tid, u16 *ssn);
bool ath_tx_aggr_stop(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid,
void ath_tx_aggr_stop(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid);
		      bool flush);
void ath_tx_aggr_resume(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid);
void ath_tx_aggr_resume(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid);


void ath_tx_aggr_wakeup(struct ath_softc *sc, struct ath_node *an);
void ath_tx_aggr_wakeup(struct ath_softc *sc, struct ath_node *an);
+17 −8
Original line number Original line Diff line number Diff line
@@ -1172,6 +1172,7 @@ u32 ath9k_regd_get_ctl(struct ath_regulatory *reg, struct ath9k_channel *chan)
static inline void ath9k_hw_set_dma(struct ath_hw *ah)
static inline void ath9k_hw_set_dma(struct ath_hw *ah)
{
{
	struct ath_common *common = ath9k_hw_common(ah);
	struct ath_common *common = ath9k_hw_common(ah);
	int txbuf_size;


	ENABLE_REGWRITE_BUFFER(ah);
	ENABLE_REGWRITE_BUFFER(ah);


@@ -1225,13 +1226,17 @@ static inline void ath9k_hw_set_dma(struct ath_hw *ah)
		 * So set the usable tx buf size also to half to
		 * So set the usable tx buf size also to half to
		 * avoid data/delimiter underruns
		 * avoid data/delimiter underruns
		 */
		 */
		REG_WRITE(ah, AR_PCU_TXBUF_CTRL,
		txbuf_size = AR_9285_PCU_TXBUF_CTRL_USABLE_SIZE;
			  AR_9285_PCU_TXBUF_CTRL_USABLE_SIZE);
	} else if (AR_SREV_9340_13_OR_LATER(ah)) {
	} else if (!AR_SREV_9271(ah)) {
		/* Uses fewer entries for AR934x v1.3+ to prevent rx overruns */
		REG_WRITE(ah, AR_PCU_TXBUF_CTRL,
		txbuf_size = AR_9340_PCU_TXBUF_CTRL_USABLE_SIZE;
			  AR_PCU_TXBUF_CTRL_USABLE_SIZE);
	} else {
		txbuf_size = AR_PCU_TXBUF_CTRL_USABLE_SIZE;
	}
	}


	if (!AR_SREV_9271(ah))
		REG_WRITE(ah, AR_PCU_TXBUF_CTRL, txbuf_size);

	REGWRITE_BUFFER_FLUSH(ah);
	REGWRITE_BUFFER_FLUSH(ah);


	if (AR_SREV_9300_20_OR_LATER(ah))
	if (AR_SREV_9300_20_OR_LATER(ah))
@@ -1306,9 +1311,13 @@ static bool ath9k_hw_set_reset(struct ath_hw *ah, int type)
			AR_RTC_RC_COLD_RESET | AR_RTC_RC_WARM_RESET;
			AR_RTC_RC_COLD_RESET | AR_RTC_RC_WARM_RESET;
	} else {
	} else {
		tmpReg = REG_READ(ah, AR_INTR_SYNC_CAUSE);
		tmpReg = REG_READ(ah, AR_INTR_SYNC_CAUSE);
		if (tmpReg &
		if (AR_SREV_9340(ah))
		    (AR_INTR_SYNC_LOCAL_TIMEOUT |
			tmpReg &= AR9340_INTR_SYNC_LOCAL_TIMEOUT;
		     AR_INTR_SYNC_RADM_CPL_TIMEOUT)) {
		else
			tmpReg &= AR_INTR_SYNC_LOCAL_TIMEOUT |
				  AR_INTR_SYNC_RADM_CPL_TIMEOUT;

		if (tmpReg) {
			u32 val;
			u32 val;
			REG_WRITE(ah, AR_INTR_SYNC_ENABLE, 0);
			REG_WRITE(ah, AR_INTR_SYNC_ENABLE, 0);


+1 −1
Original line number Original line Diff line number Diff line
@@ -410,7 +410,7 @@ bool ath9k_hw_resettxqueue(struct ath_hw *ah, u32 q)


	REG_WRITE(ah, AR_QMISC(q), AR_Q_MISC_DCU_EARLY_TERM_REQ);
	REG_WRITE(ah, AR_QMISC(q), AR_Q_MISC_DCU_EARLY_TERM_REQ);


	if (AR_SREV_9340(ah))
	if (AR_SREV_9340(ah) && !AR_SREV_9340_13_OR_LATER(ah))
		REG_WRITE(ah, AR_DMISC(q),
		REG_WRITE(ah, AR_DMISC(q),
			  AR_D_MISC_CW_BKOFF_EN | AR_D_MISC_FRAG_WAIT_EN | 0x1);
			  AR_D_MISC_CW_BKOFF_EN | AR_D_MISC_FRAG_WAIT_EN | 0x1);
	else
	else
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