Commit fa87bd43 authored Mar 18, 2015 by Andrzej Hajda Committed by Kukjin Kim Mar 18, 2015

ARM: dts: add async-bridge clocks to gsc power domain for exynos5420

Both GSCALER IPs in gsc power domain have async-bridges (to FIMD and MIXER),
therefore their clocks should be enabled during power domain switch.

Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Tested-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Kukjin Kim <kgene@kernel.org>

parent ffb8b1ee

arch/arm/boot/dts/exynos5420.dtsi

+2 −0

Original line number	Diff line number	Diff line
		@@ -251,6 +251,8 @@
		compatible = "samsung,exynos4210-pd";
		reg = <0x10044000 0x20>;
		#power-domain-cells = <0>;
		clocks = <&clock CLK_GSCL0>, <&clock CLK_GSCL1>;
		clock-names = "asb0", "asb1";
		};

		isp_pd: power-domain@10044020 {