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Commit f98c96b0 authored by Jayamohan Kallickal's avatar Jayamohan Kallickal Committed by James Bottomley
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[SCSI] be2iscsi: Adding support for BE3



This patch contains changes to support the BE3 chip

Signed-off-by: default avatarJayamohan Kallickal <jayamohank@serverengines.com>
Signed-off-by: default avatarJames Bottomley <James.Bottomley@suse.de>
parent b3925514
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+3 −0
Original line number Diff line number Diff line
@@ -25,6 +25,9 @@
#define MCC_Q_LEN	128
#define MCC_CQ_LEN	256
#define MAX_MCC_CMD	16
/* BladeEngine Generation numbers */
#define BE_GEN2 2
#define BE_GEN3 3

struct be_dma_mem {
	void *va;
+25 −5
Original line number Diff line number Diff line
@@ -61,10 +61,10 @@ static int beiscsi_slave_configure(struct scsi_device *sdev)
/*------------------- PCI Driver operations and data ----------------- */
static DEFINE_PCI_DEVICE_TABLE(beiscsi_pci_id_table) = {
	{ PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID1) },
	{ PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID2) },
	{ PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID1) },
	{ PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID2) },
	{ PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID3) },
	{ PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID4) },
	{ 0 }
};
MODULE_DEVICE_TABLE(pci, beiscsi_pci_id_table);
@@ -143,6 +143,7 @@ static int beiscsi_map_pci_bars(struct beiscsi_hba *phba,
				struct pci_dev *pcidev)
{
	u8 __iomem *addr;
	int pcicfg_reg;

	addr = ioremap_nocache(pci_resource_start(pcidev, 2),
			       pci_resource_len(pcidev, 2));
@@ -159,13 +160,19 @@ static int beiscsi_map_pci_bars(struct beiscsi_hba *phba,
	phba->db_va = addr;
	phba->db_pa.u.a64.address =  pci_resource_start(pcidev, 4);

	addr = ioremap_nocache(pci_resource_start(pcidev, 1),
			       pci_resource_len(pcidev, 1));
	if (phba->generation == BE_GEN2)
		pcicfg_reg = 1;
	else
		pcicfg_reg = 0;

	addr = ioremap_nocache(pci_resource_start(pcidev, pcicfg_reg),
			       pci_resource_len(pcidev, pcicfg_reg));

	if (addr == NULL)
		goto pci_map_err;
	phba->ctrl.pcicfg = addr;
	phba->pci_va = addr;
	phba->pci_pa.u.a64.address = pci_resource_start(pcidev, 1);
	phba->pci_pa.u.a64.address = pci_resource_start(pcidev, pcicfg_reg);
	return 0;

pci_map_err:
@@ -3492,7 +3499,6 @@ static int beiscsi_mtask(struct iscsi_task *task)
		      io_task->pwrb_handle->wrb_index);
	AMAP_SET_BITS(struct amap_iscsi_wrb, sgl_icd_idx, pwrb,
		      io_task->psgl_handle->sgl_index);

	switch (task->hdr->opcode & ISCSI_OPCODE_MASK) {
	case ISCSI_OP_LOGIN:
		AMAP_SET_BITS(struct amap_iscsi_wrb, type, pwrb,
@@ -3695,6 +3701,20 @@ static int __devinit beiscsi_dev_probe(struct pci_dev *pcidev,
	}
	SE_DEBUG(DBG_LVL_8, " phba = %p \n", phba);

	switch (pcidev->device) {
	case BE_DEVICE_ID1:
	case OC_DEVICE_ID1:
	case OC_DEVICE_ID2:
		phba->generation = BE_GEN2;
		break;
	case BE_DEVICE_ID2:
	case OC_DEVICE_ID3:
		phba->generation = BE_GEN3;
		break;
	default:
		phba->generation = 0;
	}

	if (enable_msix)
		num_cpus = find_num_cpus();
	else
+5 −1
Original line number Diff line number Diff line
@@ -40,11 +40,14 @@
#define DRV_DESC		BE_NAME " " "Driver"

#define BE_VENDOR_ID 		0x19A2
/* DEVICE ID's for BE2 */
#define BE_DEVICE_ID1		0x212
#define OC_DEVICE_ID1		0x702
#define OC_DEVICE_ID2		0x703

/* DEVICE ID's for BE3 */
#define BE_DEVICE_ID2		0x222
#define OC_DEVICE_ID3		0x712
#define OC_DEVICE_ID4		0x222

#define BE2_IO_DEPTH		1024
#define BE2_MAX_SESSIONS	256
@@ -325,6 +328,7 @@ struct beiscsi_hba {
	struct workqueue_struct *wq;	/* The actuak work queue */
	struct work_struct work_cqs;	/* The work being queued */
	struct be_ctrl_info ctrl;
	unsigned int generation;
};

struct beiscsi_session {
+2 −0
Original line number Diff line number Diff line
@@ -85,6 +85,7 @@ unsigned char mgmt_check_supported_fw(struct be_ctrl_info *ctrl,
	}
	nonemb_cmd.size = sizeof(struct be_mgmt_controller_attributes);
	req = nonemb_cmd.va;
	memset(req, 0, sizeof(*req));
	spin_lock(&ctrl->mbox_lock);
	memset(wrb, 0, sizeof(*wrb));
	be_wrb_hdr_prepare(wrb, sizeof(*req), false, 1);
@@ -171,6 +172,7 @@ unsigned char mgmt_invalidate_icds(struct beiscsi_hba *phba,
	}
	nonemb_cmd.size = sizeof(struct invalidate_commands_params_in);
	req = nonemb_cmd.va;
	memset(req, 0, sizeof(*req));
	wrb = wrb_from_mccq(phba);
	sge = nonembedded_sgl(wrb);
	wrb->tag0 |= tag;