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Commit f94d8103 authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
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Merge "Merge android-4.4.113 (ef588ef5) into msm-4.4"

parents 1d316f30 c43902ee

Documentation/kernel-parameters.txt

+28 −0
Original line number Diff line number Diff line
@@ -2468,6 +2468,11 @@ bytes respectively. Such letter suffixes can also be entirely omitted. 


	nohugeiomap	[KNL,x86] Disable kernel huge I/O mappings.



	nospectre_v2	[X86] Disable all mitigations for the Spectre variant 2

			(indirect branch prediction) vulnerability. System may

			allow data leaks with this option, which is equivalent

			to spectre_v2=off.



	noxsave		[BUGS=X86] Disables x86 extended register state save

			and restore using xsave. The kernel will fallback to

			enabling legacy floating-point and sse state.
@@ -3619,6 +3624,29 @@ bytes respectively. Such letter suffixes can also be entirely omitted. 
	sonypi.*=	[HW] Sony Programmable I/O Control Device driver

			See Documentation/laptops/sonypi.txt



	spectre_v2=	[X86] Control mitigation of Spectre variant 2

			(indirect branch speculation) vulnerability.



			on   - unconditionally enable

			off  - unconditionally disable

			auto - kernel detects whether your CPU model is

			       vulnerable



			Selecting 'on' will, and 'auto' may, choose a

			mitigation method at run time according to the

			CPU, the available microcode, the setting of the

			CONFIG_RETPOLINE configuration option, and the

			compiler with which the kernel was built.



			Specific mitigations can also be selected manually:



			retpoline	  - replace indirect branches

			retpoline,generic - google's original retpoline

			retpoline,amd     - AMD-specific minimal thunk



			Not specifying this option is equivalent to

			spectre_v2=auto.



	spia_io_base=	[HW,MTD]

	spia_fio_base=

	spia_pedr=

Documentation/x86/pti.txt

+1 −1
Original line number Diff line number Diff line
@@ -78,7 +78,7 @@ this protection comes at a cost: 
     non-PTI SYSCALL entry code, so requires mapping fewer

     things into the userspace page tables.  The downside is

     that stacks must be switched at entry time.

  d. Global pages are disabled for all kernel structures not

  c. Global pages are disabled for all kernel structures not

     mapped into both kernel and userspace page tables.  This

     feature of the MMU allows different processes to share TLB

     entries mapping the kernel.  Losing the feature means more

Makefile

+1 −1
Original line number Diff line number Diff line 
VERSION = 4

PATCHLEVEL = 4

SUBLEVEL = 112

SUBLEVEL = 113

EXTRAVERSION =

NAME = Blurry Fish Butt

arch/arm/boot/dts/kirkwood-openblocks_a7.dts

+8 −2
Original line number Diff line number Diff line
@@ -53,7 +53,8 @@ 
		};



		pinctrl: pin-controller@10000 {

			pinctrl-0 = <&pmx_dip_switches &pmx_gpio_header>;

			pinctrl-0 = <&pmx_dip_switches &pmx_gpio_header

				     &pmx_gpio_header_gpo>;

			pinctrl-names = "default";



			pmx_uart0: pmx-uart0 {
@@ -85,11 +86,16 @@ 
			 * ground.

			 */

			pmx_gpio_header: pmx-gpio-header {

				marvell,pins = "mpp17", "mpp7", "mpp29", "mpp28",

				marvell,pins = "mpp17", "mpp29", "mpp28",

					       "mpp35", "mpp34", "mpp40";

				marvell,function = "gpio";

			};



			pmx_gpio_header_gpo: pxm-gpio-header-gpo {

				marvell,pins = "mpp7";

				marvell,function = "gpo";

			};



			pmx_gpio_init: pmx-init {

				marvell,pins = "mpp38";

				marvell,function = "gpio";

arch/arm64/include/asm/assembler.h

+0 −13
Original line number Diff line number Diff line
@@ -410,17 +410,4 @@ alternative_endif 
	mrs	\rd, sp_el0

	.endm



/*

 * Errata workaround post TTBR0_EL1 update.

 */

	.macro	post_ttbr0_update_workaround

#ifdef CONFIG_CAVIUM_ERRATUM_27456

alternative_if ARM64_WORKAROUND_CAVIUM_27456

	ic	iallu

	dsb	nsh

	isb

alternative_else_nop_endif

#endif

	.endm



#endif	/* __ASM_ASSEMBLER_H */