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Commit f79683de authored by Kalle Valo's avatar Kalle Valo
Browse files

Merge ath-next from ath.git 

Major changes in ath10k:

* add spectral scan support for 10.4 firmware
* add qca6164 support
* implement mesh support using firmware raw mode
parents 1f9c6e1b b8402d82

drivers/net/wireless/ath/ath10k/core.c

+23 −0
Original line number Diff line number Diff line
@@ -34,16 +34,19 @@ unsigned int ath10k_debug_mask; 
static unsigned int ath10k_cryptmode_param;

static bool uart_print;

static bool skip_otp;

static bool rawmode;



module_param_named(debug_mask, ath10k_debug_mask, uint, 0644);

module_param_named(cryptmode, ath10k_cryptmode_param, uint, 0644);

module_param(uart_print, bool, 0644);

module_param(skip_otp, bool, 0644);

module_param(rawmode, bool, 0644);



MODULE_PARM_DESC(debug_mask, "Debugging mask");

MODULE_PARM_DESC(uart_print, "Uart target debugging");

MODULE_PARM_DESC(skip_otp, "Skip otp failure for calibration in testmode");

MODULE_PARM_DESC(cryptmode, "Crypto mode: 0-hardware, 1-software");

MODULE_PARM_DESC(rawmode, "Use raw 802.11 frame datapath");



static const struct ath10k_hw_params ath10k_hw_params_list[] = {

	{
@@ -54,6 +57,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
		.has_shifted_cc_wraparound = true,

		.otp_exe_param = 0,

		.channel_counters_freq_hz = 88000,

		.max_probe_resp_desc_thres = 0,

		.fw = {

			.dir = QCA988X_HW_2_0_FW_DIR,

			.fw = QCA988X_HW_2_0_FW_FILE,
@@ -70,6 +74,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
		.uart_pin = 6,

		.otp_exe_param = 0,

		.channel_counters_freq_hz = 88000,

		.max_probe_resp_desc_thres = 0,

		.fw = {

			.dir = QCA6174_HW_2_1_FW_DIR,

			.fw = QCA6174_HW_2_1_FW_FILE,
@@ -86,6 +91,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
		.uart_pin = 6,

		.otp_exe_param = 0,

		.channel_counters_freq_hz = 88000,

		.max_probe_resp_desc_thres = 0,

		.fw = {

			.dir = QCA6174_HW_3_0_FW_DIR,

			.fw = QCA6174_HW_3_0_FW_FILE,
@@ -102,6 +108,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
		.uart_pin = 6,

		.otp_exe_param = 0,

		.channel_counters_freq_hz = 88000,

		.max_probe_resp_desc_thres = 0,

		.fw = {

			/* uses same binaries as hw3.0 */

			.dir = QCA6174_HW_3_0_FW_DIR,
@@ -120,6 +127,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
		.otp_exe_param = 0x00000700,

		.continuous_frag_desc = true,

		.channel_counters_freq_hz = 150000,

		.max_probe_resp_desc_thres = 24,

		.fw = {

			.dir = QCA99X0_HW_2_0_FW_DIR,

			.fw = QCA99X0_HW_2_0_FW_FILE,
@@ -142,12 +150,17 @@ static const char *const ath10k_core_fw_feature_str[] = { 
	[ATH10K_FW_FEATURE_IGNORE_OTP_RESULT] = "ignore-otp",

	[ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING] = "no-4addr-pad",

	[ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT] = "skip-clock-init",

	[ATH10K_FW_FEATURE_RAW_MODE_SUPPORT] = "raw-mode",

};



static unsigned int ath10k_core_get_fw_feature_str(char *buf,

						   size_t buf_len,

						   enum ath10k_fw_features feat)

{

	/* make sure that ath10k_core_fw_feature_str[] gets updated */

	BUILD_BUG_ON(ARRAY_SIZE(ath10k_core_fw_feature_str) !=

		     ATH10K_FW_FEATURE_COUNT);



	if (feat >= ARRAY_SIZE(ath10k_core_fw_feature_str) ||

	    WARN_ON(!ath10k_core_fw_feature_str[feat])) {

		return scnprintf(buf, buf_len, "bit%d", feat);
@@ -1117,6 +1130,15 @@ static int ath10k_core_init_firmware_features(struct ath10k *ar) 
	ar->htt.max_num_amsdu = ATH10K_HTT_MAX_NUM_AMSDU_DEFAULT;

	ar->htt.max_num_ampdu = ATH10K_HTT_MAX_NUM_AMPDU_DEFAULT;



	if (rawmode) {

		if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT,

			      ar->fw_features)) {

			ath10k_err(ar, "rawmode = 1 requires support from firmware");

			return -EINVAL;

		}

		set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);

	}



	if (test_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags)) {

		ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_RAW;
@@ -1714,6 +1736,7 @@ void ath10k_core_destroy(struct ath10k *ar) 
	destroy_workqueue(ar->workqueue_aux);



	ath10k_debug_destroy(ar);

	ath10k_wmi_free_host_mem(ar);

	ath10k_mac_destroy(ar);

}

EXPORT_SYMBOL(ath10k_core_destroy);

drivers/net/wireless/ath/ath10k/core.h

+5 −0
Original line number Diff line number Diff line
@@ -612,6 +612,11 @@ struct ath10k { 


		u32 channel_counters_freq_hz;



		/* Mgmt tx descriptors threshold for limiting probe response

		 * frames.

		 */

		u32 max_probe_resp_desc_thres;



		struct ath10k_hw_params_fw {

			const char *dir;

			const char *fw;

drivers/net/wireless/ath/ath10k/htt.h

+2 −1
Original line number Diff line number Diff line
@@ -1485,6 +1485,7 @@ struct ath10k_htt { 
	spinlock_t tx_lock;

	int max_num_pending_tx;

	int num_pending_tx;

	int num_pending_mgmt_tx;

	struct idr pending_tx;

	wait_queue_head_t empty_tx_wq;

	struct dma_pool *tx_pool;
@@ -1587,7 +1588,7 @@ int ath10k_htt_h2t_aggr_cfg_msg(struct ath10k_htt *htt, 
				u8 max_subfrms_ampdu,

				u8 max_subfrms_amsdu);



void __ath10k_htt_tx_dec_pending(struct ath10k_htt *htt);

void __ath10k_htt_tx_dec_pending(struct ath10k_htt *htt, bool limit_mgmt_desc);

int ath10k_htt_tx_alloc_msdu_id(struct ath10k_htt *htt, struct sk_buff *skb);

void ath10k_htt_tx_free_msdu_id(struct ath10k_htt *htt, u16 msdu_id);

int ath10k_htt_mgmt_tx(struct ath10k_htt *htt, struct sk_buff *);

drivers/net/wireless/ath/ath10k/htt_rx.c

+45 −2
Original line number Diff line number Diff line
@@ -643,6 +643,8 @@ struct amsdu_subframe_hdr { 
	__be16 len;

} __packed;



#define GROUP_ID_IS_SU_MIMO(x) ((x) == 0 || (x) == 63)



static void ath10k_htt_rx_h_rates(struct ath10k *ar,

				  struct ieee80211_rx_status *status,

				  struct htt_rx_desc *rxd)
@@ -650,6 +652,7 @@ static void ath10k_htt_rx_h_rates(struct ath10k *ar, 
	struct ieee80211_supported_band *sband;

	u8 cck, rate, bw, sgi, mcs, nss;

	u8 preamble = 0;

	u8 group_id;

	u32 info1, info2, info3;



	info1 = __le32_to_cpu(rxd->ppdu_start.info1);
@@ -692,10 +695,50 @@ static void ath10k_htt_rx_h_rates(struct ath10k *ar, 
	case HTT_RX_VHT_WITH_TXBF:

		/* VHT-SIG-A1 in info2, VHT-SIG-A2 in info3

		   TODO check this */

		mcs = (info3 >> 4) & 0x0F;

		nss = ((info2 >> 10) & 0x07) + 1;

		bw = info2 & 3;

		sgi = info3 & 1;

		group_id = (info2 >> 4) & 0x3F;



		if (GROUP_ID_IS_SU_MIMO(group_id)) {

			mcs = (info3 >> 4) & 0x0F;

			nss = ((info2 >> 10) & 0x07) + 1;

		} else {

			/* Hardware doesn't decode VHT-SIG-B into Rx descriptor

			 * so it's impossible to decode MCS. Also since

			 * firmware consumes Group Id Management frames host

			 * has no knowledge regarding group/user position

			 * mapping so it's impossible to pick the correct Nsts

			 * from VHT-SIG-A1.

			 *

			 * Bandwidth and SGI are valid so report the rateinfo

			 * on best-effort basis.

			 */

			mcs = 0;

			nss = 1;

		}



		if (mcs > 0x09) {

			ath10k_warn(ar, "invalid MCS received %u\n", mcs);

			ath10k_warn(ar, "rxd %08x mpdu start %08x %08x msdu start %08x %08x ppdu start %08x %08x %08x %08x %08x\n",

				    __le32_to_cpu(rxd->attention.flags),

				    __le32_to_cpu(rxd->mpdu_start.info0),

				    __le32_to_cpu(rxd->mpdu_start.info1),

				    __le32_to_cpu(rxd->msdu_start.common.info0),

				    __le32_to_cpu(rxd->msdu_start.common.info1),

				    rxd->ppdu_start.info0,

				    __le32_to_cpu(rxd->ppdu_start.info1),

				    __le32_to_cpu(rxd->ppdu_start.info2),

				    __le32_to_cpu(rxd->ppdu_start.info3),

				    __le32_to_cpu(rxd->ppdu_start.info4));



			ath10k_warn(ar, "msdu end %08x mpdu end %08x\n",

				    __le32_to_cpu(rxd->msdu_end.common.info0),

				    __le32_to_cpu(rxd->mpdu_end.info0));



			ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL,

					"rx desc msdu payload: ",

					rxd->msdu_payload, 50);

		}



		status->rate_idx = mcs;

		status->vht_nss = nss;

drivers/net/wireless/ath/ath10k/htt_tx.c

+46 −9
Original line number Diff line number Diff line
@@ -22,22 +22,28 @@ 
#include "txrx.h"

#include "debug.h"



void __ath10k_htt_tx_dec_pending(struct ath10k_htt *htt)

void __ath10k_htt_tx_dec_pending(struct ath10k_htt *htt, bool limit_mgmt_desc)

{

	if (limit_mgmt_desc)

		htt->num_pending_mgmt_tx--;



	htt->num_pending_tx--;

	if (htt->num_pending_tx == htt->max_num_pending_tx - 1)

		ath10k_mac_tx_unlock(htt->ar, ATH10K_TX_PAUSE_Q_FULL);

}



static void ath10k_htt_tx_dec_pending(struct ath10k_htt *htt)

static void ath10k_htt_tx_dec_pending(struct ath10k_htt *htt,

				      bool limit_mgmt_desc)

{

	spin_lock_bh(&htt->tx_lock);

	__ath10k_htt_tx_dec_pending(htt);

	__ath10k_htt_tx_dec_pending(htt, limit_mgmt_desc);

	spin_unlock_bh(&htt->tx_lock);

}



static int ath10k_htt_tx_inc_pending(struct ath10k_htt *htt)

static int ath10k_htt_tx_inc_pending(struct ath10k_htt *htt,

				     bool limit_mgmt_desc, bool is_probe_resp)

{

	struct ath10k *ar = htt->ar;

	int ret = 0;



	spin_lock_bh(&htt->tx_lock);
@@ -47,6 +53,15 @@ static int ath10k_htt_tx_inc_pending(struct ath10k_htt *htt) 
		goto exit;

	}



	if (limit_mgmt_desc) {

		if (is_probe_resp && (htt->num_pending_mgmt_tx >

		    ar->hw_params.max_probe_resp_desc_thres)) {

			ret = -EBUSY;

			goto exit;

		}

		htt->num_pending_mgmt_tx++;

	}



	htt->num_pending_tx++;

	if (htt->num_pending_tx == htt->max_num_pending_tx)

		ath10k_mac_tx_lock(htt->ar, ATH10K_TX_PAUSE_Q_FULL);
@@ -417,8 +432,19 @@ int ath10k_htt_mgmt_tx(struct ath10k_htt *htt, struct sk_buff *msdu) 
	int len = 0;

	int msdu_id = -1;

	int res;

	struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)msdu->data;

	bool limit_mgmt_desc = false;

	bool is_probe_resp = false;



	if (ar->hw_params.max_probe_resp_desc_thres) {

		limit_mgmt_desc = true;



		if (ieee80211_is_probe_resp(hdr->frame_control))

			is_probe_resp = true;

	}



	res = ath10k_htt_tx_inc_pending(htt, limit_mgmt_desc, is_probe_resp);



	res = ath10k_htt_tx_inc_pending(htt);

	if (res)

		goto err;
@@ -476,7 +502,7 @@ err_free_msdu_id: 
	ath10k_htt_tx_free_msdu_id(htt, msdu_id);

	spin_unlock_bh(&htt->tx_lock);

err_tx_dec:

	ath10k_htt_tx_dec_pending(htt);

	ath10k_htt_tx_dec_pending(htt, limit_mgmt_desc);

err:

	return res;

}
@@ -498,8 +524,18 @@ int ath10k_htt_tx(struct ath10k_htt *htt, struct sk_buff *msdu) 
	dma_addr_t paddr = 0;

	u32 frags_paddr = 0;

	struct htt_msdu_ext_desc *ext_desc = NULL;

	bool limit_mgmt_desc = false;

	bool is_probe_resp = false;



	res = ath10k_htt_tx_inc_pending(htt);

	if (unlikely(ieee80211_is_mgmt(hdr->frame_control)) &&

	    ar->hw_params.max_probe_resp_desc_thres) {

		limit_mgmt_desc = true;



		if (ieee80211_is_probe_resp(hdr->frame_control))

			is_probe_resp = true;

	}



	res = ath10k_htt_tx_inc_pending(htt, limit_mgmt_desc, is_probe_resp);

	if (res)

		goto err;
@@ -528,7 +564,8 @@ int ath10k_htt_tx(struct ath10k_htt *htt, struct sk_buff *msdu) 
	     ieee80211_has_protected(hdr->frame_control)) {

		skb_put(msdu, IEEE80211_CCMP_MIC_LEN);

	} else if (!skb_cb->htt.nohwcrypt &&

		   skb_cb->txmode == ATH10K_HW_TXRX_RAW) {

		   skb_cb->txmode == ATH10K_HW_TXRX_RAW &&

		   ieee80211_has_protected(hdr->frame_control)) {

		skb_put(msdu, IEEE80211_CCMP_MIC_LEN);

	}
@@ -678,7 +715,7 @@ err_free_msdu_id: 
	ath10k_htt_tx_free_msdu_id(htt, msdu_id);

	spin_unlock_bh(&htt->tx_lock);

err_tx_dec:

	ath10k_htt_tx_dec_pending(htt);

	ath10k_htt_tx_dec_pending(htt, limit_mgmt_desc);

err:

	return res;

}