Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit f60b2ad2 authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
Browse files

Merge "ARM: dts: msm: Add cpp src clock rates configuration for msmcobalt"

parents 0579bfa1 9b67d14a

arch/arm/boot/dts/qcom/msmcobalt-camera.dtsi

+2 −0
Original line number Original line Diff line number Diff line
@@ -422,6 +422,8 @@ 
		qcom,msm-bus-vector-dyn-vote;

		qcom,msm-bus-vector-dyn-vote;

		resets = <&clock_mmss CAMSS_MICRO_BCR>;

		resets = <&clock_mmss CAMSS_MICRO_BCR>;

		reset-names = "micro_iface_reset";

		reset-names = "micro_iface_reset";

		qcom,src-clock-rates = <100000000 200000000 576000000

			600000000>;

		qcom,cpp-fw-payload-info {

		qcom,cpp-fw-payload-info {

			qcom,stripe-base = <790>;

			qcom,stripe-base = <790>;

			qcom,plane-base = <715>;

			qcom,plane-base = <715>;

arch/arm/boot/dts/qcom/msmcobalt-v2-camera.dtsi

+71 −0
Original line number Original line Diff line number Diff line
@@ -116,5 +116,76 @@ 
			0 256000000 0>;

			0 256000000 0>;

		status = "ok";

		status = "ok";

	};

	};



	qcom,cpp@ca04000 {

		cell-index = <0>;

		compatible = "qcom,cpp";

		reg = <0xca04000 0x100>,

			<0xca80000 0x3000>,

			<0xca18000 0x3000>,

			<0xc8c36d4 0x4>;

		reg-names = "cpp", "cpp_vbif", "cpp_hw", "camss_cpp";

		interrupts = <0 294 0>;

		interrupt-names = "cpp";

		smmu-vdd-supply = <&gdsc_bimc_smmu>;

		camss-vdd-supply = <&gdsc_camss_top>;

		vdd-supply = <&gdsc_cpp>;

		qcom,vdd-names = "smmu-vdd", "camss-vdd", "vdd";

		clocks = <&clock_gcc clk_mmssnoc_axi_clk>,

			<&clock_mmss clk_mmss_mnoc_ahb_clk>,

			<&clock_mmss clk_mmss_camss_ahb_clk>,

			<&clock_mmss clk_mmss_camss_top_ahb_clk>,

			<&clock_mmss clk_cpp_clk_src>,

			<&clock_mmss clk_mmss_camss_cpp_clk>,

			<&clock_mmss clk_mmss_camss_cpp_ahb_clk>,

			<&clock_mmss clk_mmss_camss_cpp_axi_clk>,

			<&clock_mmss clk_mmss_camss_micro_ahb_clk>,

			<&clock_mmss clk_mmss_bimc_smmu_axi_clk>,

			<&clock_mmss clk_mmss_camss_cpp_vbif_ahb_clk>;

		clock-names = "mmssnoc_axi_clk",

			"mnoc_ahb_clk",

			"camss_ahb_clk", "camss_top_ahb_clk",

			"cpp_src_clk",

			"cpp_core_clk", "camss_cpp_ahb_clk",

			"camss_cpp_axi_clk", "micro_iface_clk",

			"mmss_smmu_axi_clk", "cpp_vbif_ahb_clk";

		qcom,clock-rates = <0 0 0 0 200000000 200000000 0 0 0 0 0>;

		qcom,min-clock-rate = <200000000>;

		qcom,bus-master = <1>;

		qcom,vbif-qos-setting = <0x20 0x10000000>,

			<0x24 0x10000000>,

			<0x28 0x10000000>,

			<0x2C 0x10000000>;

		status = "ok";

		qcom,msm-bus,name = "msm_camera_cpp";

		qcom,msm-bus,num-cases = <2>;

		qcom,msm-bus,num-paths = <1>;

		qcom,msm-bus,vectors-KBps =

			<106 512 0 0>,

			<106 512 0 0>;

		qcom,msm-bus-vector-dyn-vote;

		resets = <&clock_mmss CAMSS_MICRO_BCR>;

		reset-names = "micro_iface_reset";

		qcom,src-clock-rates = <100000000 200000000 384000000 404000000

			480000000 576000000 600000000>;

		qcom,cpp-fw-payload-info {

			qcom,stripe-base = <790>;

			qcom,plane-base = <715>;

			qcom,stripe-size = <63>;

			qcom,plane-size = <25>;

			qcom,fe-ptr-off = <11>;

			qcom,we-ptr-off = <23>;

			qcom,ref-fe-ptr-off = <17>;

			qcom,ref-we-ptr-off = <36>;

			qcom,we-meta-ptr-off = <42>;

			qcom,fe-mmu-pf-ptr-off = <7>;

			qcom,ref-fe-mmu-pf-ptr-off = <10>;

			qcom,we-mmu-pf-ptr-off = <13>;

			qcom,dup-we-mmu-pf-ptr-off = <18>;

			qcom,ref-we-mmu-pf-ptr-off = <23>;

			qcom,set-group-buffer-len = <135>;

			qcom,dup-frame-indicator-off = <70>;

		};

	};

};

};