Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit ef48989c authored by Tony Truong's avatar Tony Truong
Browse files

ARM: dts: msm: enable QGIC MSI for PCIe on msmcobalt 



Add all SPIs for MSI, the base address, and the base SPI
to PCIe node to support and enable QGIC MSI on msmcobalt.

Change-Id: I1e74f1b03c3e15880efdac7ff07aca2f628de99d
Signed-off-by: default avatarTony Truong <truong@codeaurora.org>
parent d0430dc0

arch/arm/boot/dts/qcom/msmcobalt.dtsi

+48 −3
Original line number Diff line number Diff line
@@ -1461,7 +1461,9 @@ 
		ranges = <0x01000000 0x0 0x1b200000 0x1b200000 0x0 0x100000>,

			<0x02000000 0x0 0x1b300000 0x1b300000 0x0 0xd00000>;

		interrupt-parent = <&pcie0>;

		interrupts = <0 1 2 3 4 5>;

		interrupts = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19

				20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35

				36 37>;

		#interrupt-cells = <1>;

		interrupt-map-mask = <0 0 0 0xffffffff>;

		interrupt-map = <0 0 0 0 &intc 0 0 405 0
@@ -1469,10 +1471,50 @@ 
				0 0 0 2 &intc 0 0 136 0

				0 0 0 3 &intc 0 0 138 0

				0 0 0 4 &intc 0 0 139 0

				0 0 0 5 &intc 0 0 278 0>;

				0 0 0 5 &intc 0 0 278 0

				0 0 0 6 &intc 0 0 576 0

				0 0 0 7 &intc 0 0 577 0

				0 0 0 8 &intc 0 0 578 0

				0 0 0 9 &intc 0 0 579 0

				0 0 0 10 &intc 0 0 580 0

				0 0 0 11 &intc 0 0 581 0

				0 0 0 12 &intc 0 0 582 0

				0 0 0 13 &intc 0 0 583 0

				0 0 0 14 &intc 0 0 584 0

				0 0 0 15 &intc 0 0 585 0

				0 0 0 16 &intc 0 0 586 0

				0 0 0 17 &intc 0 0 587 0

				0 0 0 18 &intc 0 0 588 0

				0 0 0 19 &intc 0 0 589 0

				0 0 0 20 &intc 0 0 590 0

				0 0 0 21 &intc 0 0 591 0

				0 0 0 22 &intc 0 0 592 0

				0 0 0 23 &intc 0 0 593 0

				0 0 0 24 &intc 0 0 594 0

				0 0 0 25 &intc 0 0 595 0

				0 0 0 26 &intc 0 0 596 0

				0 0 0 27 &intc 0 0 597 0

				0 0 0 28 &intc 0 0 598 0

				0 0 0 29 &intc 0 0 599 0

				0 0 0 30 &intc 0 0 600 0

				0 0 0 31 &intc 0 0 601 0

				0 0 0 32 &intc 0 0 602 0

				0 0 0 33 &intc 0 0 603 0

				0 0 0 34 &intc 0 0 604 0

				0 0 0 35 &intc 0 0 605 0

				0 0 0 36 &intc 0 0 606 0

				0 0 0 37 &intc 0 0 607 0>;



		interrupt-names = "int_msi", "int_a", "int_b", "int_c",

				"int_d", "int_global_int";

				"int_d", "int_global_int",

				"msi_0", "msi_1", "msi_2", "msi_3",

				"msi_4", "msi_5", "msi_6", "msi_7",

				"msi_8", "msi_9", "msi_10", "msi_11",

				"msi_12", "msi_13", "msi_14", "msi_15",

				"msi_16", "msi_17", "msi_18", "msi_19",

				"msi_20", "msi_21", "msi_22", "msi_23",

				"msi_24", "msi_25", "msi_26", "msi_27",

				"msi_28", "msi_29", "msi_30", "msi_31";



		qcom,phy-sequence = <0x804 0x01 0x00

					0x034 0x14 0x00
@@ -1578,6 +1620,9 @@ 


		linux,pci-domain = <0>;



		qcom,msi-gicm-addr = <0x17a00040>;

		qcom,msi-gicm-base = <0x260>;



		qcom,pcie-phy-ver = <0x20>;

		qcom,use-19p2mhz-aux-clk;