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Commit ef0049ee authored by Skylar Chang's avatar Skylar Chang Committed by Gerrit - the friendly Code Review server
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ARM: dts: msm: put ipa3 in smmu s1-bypass on msmcobalt 



Enable SMMU on IPA3 and put in stage1-bypass mode to
not do the memory mapping.

Change-Id: Id2811c67a423c82201993b3119647a3d4caf4517
Acked-by: default avatarAdy Abraham <adya@qti.qualcomm.com>
Signed-off-by: default avatarSkylar Chang <chiaweic@codeaurora.org>
parent d1313a37

arch/arm/boot/dts/qcom/msmcobalt.dtsi

+23 −2
Original line number Diff line number Diff line
@@ -966,8 +966,12 @@ 
		qcom,do-not-use-ch-gsi-20;

		qcom,ipa-wdi2;

		qcom,use-64-bit-dma-mask;

		clock-names = "core_clk";

		clocks = <&clock_gcc clk_ipa_clk>;

		clocks = <&clock_gcc clk_ipa_clk>,

			<&clock_gcc clk_aggre2_noc_clk>;

		clock-names = "core_clk", "smmu_clk";

		qcom,arm-smmu;

		qcom,smmu-disable-htw;

		qcom,smmu-s1-bypass;

		qcom,msm-bus,name = "ipa";

		qcom,msm-bus,num-cases = <4>;

		qcom,msm-bus,num-paths = <3>;
@@ -1074,6 +1078,23 @@ 
			compatible = "qcom,smp2pgpio-map-ipa-1-in";

			gpios = <&smp2pgpio_ipa_1_in 0 0>;

		};



		ipa_smmu_ap: ipa_smmu_ap {

			compatible = "qcom,ipa-smmu-ap-cb";

			iommus = <&anoc2_smmu 0x18e0>;

			qcom,iova-mapping = <0x10000000 0x40000000>;

		};



		ipa_smmu_wlan: ipa_smmu_wlan {

			compatible = "qcom,ipa-smmu-wlan-cb";

			iommus = <&anoc2_smmu 0x18e1>;

		};



		ipa_smmu_uc: ipa_smmu_uc {

			compatible = "qcom,ipa-smmu-uc-cb";

			iommus = <&anoc2_smmu 0x18e2>;

			qcom,iova-mapping = <0x40000000 0x20000000>;

		};

	};



	qcom,ipa_fws@1e08000 {