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Commit ee65608b authored by David Collins's avatar David Collins
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ARM: dts: msm: modify VDD_APC0/1 CPR voltages for msmcobalt v2



Update the VDD_APC0 and VDD_APC1 CPR voltage configurations for
MSMCOBALT v2 devices in order to match the most recent guidelines
from hardware characterization.  Increase the VDD_APC0 and
VDD_APC1 Fmax and intermediate Nominal corner ceiling voltages
to 900 mV.  Also increase the VDD_APC0 Turbo_L1 open-loop and
closed-loop voltage adjustment to 30 mV.

Change-Id: Id2de8e2ac94476c1a4927f719f2987a31d692ab5
CRs-Fixed: 1070187
Signed-off-by: default avatarDavid Collins <collinsd@codeaurora.org>
parent 4e2a8a0f
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+40 −40
Original line number Diff line number Diff line
@@ -250,14 +250,14 @@
		/* Speed bin 0 */
		<828000  828000  828000  828000  828000
		 828000  828000  828000  828000  828000
		 828000  828000  828000  828000  828000
		 828000  828000  828000  952000  952000
		 828000  900000  900000  900000  900000
		 900000  900000  900000  952000  952000
		1056000 1056000>,
		/* Speed bin 1 */
		<828000  828000  828000  828000  828000
		 828000  828000  828000  828000  828000
		 828000  828000  828000  828000  828000
		 828000  828000  828000  952000  952000
		 828000  900000  900000  900000  900000
		 900000  900000  900000  952000  952000
		1056000 1056000>;

	qcom,cpr-voltage-floor =
@@ -326,43 +326,43 @@

	qcom,cpr-open-loop-voltage-fuse-adjustment =
		/* Speed bin 0 */
		<40000 24000 0 0>,
		<40000 24000 0 0>,
		<40000 24000 0 0>,
		<40000 24000 0 0>,
		<40000 24000 0 0>,
		<40000 24000 0 0>,
		<40000 24000 0 0>,
		<40000 24000 0 0>,
		<40000 24000 0 30000>,
		<40000 24000 0 30000>,
		<40000 24000 0 30000>,
		<40000 24000 0 30000>,
		<40000 24000 0 30000>,
		<40000 24000 0 30000>,
		<40000 24000 0 30000>,
		<40000 24000 0 30000>,
		/* Speed bin 1 */
		<40000 24000 0 0>,
		<40000 24000 0 0>,
		<40000 24000 0 0>,
		<40000 24000 0 0>,
		<40000 24000 0 0>,
		<40000 24000 0 0>,
		<40000 24000 0 0>,
		<40000 24000 0 0>;
		<40000 24000 0 30000>,
		<40000 24000 0 30000>,
		<40000 24000 0 30000>,
		<40000 24000 0 30000>,
		<40000 24000 0 30000>,
		<40000 24000 0 30000>,
		<40000 24000 0 30000>,
		<40000 24000 0 30000>;

	qcom,cpr-closed-loop-voltage-fuse-adjustment =
		/* Speed bin 0 */
		<20000 26000 0 0>,
		<20000 26000 0 0>,
		<20000 26000 0 0>,
		<20000 26000 0 0>,
		<20000 26000 0 0>,
		<20000 26000 0 0>,
		<20000 26000 0 0>,
		<20000 26000 0 0>,
		<20000 26000 0 30000>,
		<20000 26000 0 30000>,
		<20000 26000 0 30000>,
		<20000 26000 0 30000>,
		<20000 26000 0 30000>,
		<20000 26000 0 30000>,
		<20000 26000 0 30000>,
		<20000 26000 0 30000>,
		/* Speed bin 1 */
		<20000 26000 0 0>,
		<20000 26000 0 0>,
		<20000 26000 0 0>,
		<20000 26000 0 0>,
		<20000 26000 0 0>,
		<20000 26000 0 0>,
		<20000 26000 0 0>,
		<20000 26000 0 0>;
		<20000 26000 0 30000>,
		<20000 26000 0 30000>,
		<20000 26000 0 30000>,
		<20000 26000 0 30000>,
		<20000 26000 0 30000>,
		<20000 26000 0 30000>,
		<20000 26000 0 30000>,
		<20000 26000 0 30000>;

	qcom,allow-voltage-interpolation;
	qcom,allow-quotient-interpolation;
@@ -396,15 +396,15 @@
		/* Speed bin 0 */
		<828000  828000  828000  828000  828000
		 828000  828000  828000  828000  828000
		 828000  828000  828000  828000  828000
		 828000  828000  828000  828000  828000
		 828000  828000  900000  900000  900000
		 900000  900000  900000  900000  900000
		 952000  952000  952000 1056000 1056000
		1056000 1056000 1056000 1056000 1056000>,
		/* Speed bin 1 */
		<828000  828000  828000  828000  828000
		 828000  828000  828000  828000  828000
		 828000  828000  828000  828000  828000
		 828000  828000  828000  828000  828000
		 828000  828000  900000  900000  900000
		 900000  900000  900000  900000  900000
		 952000  952000  952000 1056000 1056000
		1056000>;