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Commit ebdfa885 authored by Amit Nischal's avatar Amit Nischal Committed by Kyle Yan
Browse files

clk: qcom: gcc-msm8996: Add missing BCR for USB3 and PCIE clocks 



The block reset registers for USB3 and PCIE will be required by the clients
to reset their subsystem blocks so add them in the reset map.

Change-Id: Ie30158592fca057454152f3f46a5d8b89ae36b88
Signed-off-by: default avatarAmit Nischal <anischal@codeaurora.org>
parent 22f76842

drivers/clk/qcom/gcc-msm8996.c

+4 −0
Original line number Diff line number Diff line
@@ -3435,6 +3435,10 @@ static const struct qcom_reset_map gcc_msm8996_resets[] = { 
	[GCC_MSMPU_BCR] = { 0x8d000 },

	[GCC_MSS_Q6_BCR] = { 0x8e000 },

	[GCC_QREFS_VBG_CAL_BCR] = { 0x88020 },

	[GCC_USB3_PHY_BCR] = { 0x50020 },

	[GCC_USB3PHY_PHY_BCR] = { 0x50024 },

	[GCC_PCIE_PHY_NOCSR_COM_PHY_BCR] = { 0x6F00C },

	[GCC_PCIE_PHY_COM_BCR] = { 0x6F014 },

};



static const struct regmap_config gcc_msm8996_regmap_config = {

include/dt-bindings/clock/qcom,gcc-msm8996.h

+4 −0
Original line number Diff line number Diff line
@@ -335,6 +335,10 @@ 
#define GCC_MSMPU_BCR						98

#define GCC_MSS_Q6_BCR						99

#define GCC_QREFS_VBG_CAL_BCR					100

#define GCC_USB3_PHY_BCR					101

#define GCC_USB3PHY_PHY_BCR					102

#define GCC_PCIE_PHY_NOCSR_COM_PHY_BCR				103

#define GCC_PCIE_PHY_COM_BCR					104



/* Indexes for GDSCs */

#define AGGRE0_NOC_GDSC			0