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Commit ebb7ac6b authored by Ashay Jaiswal's avatar Ashay Jaiswal Committed by Gerrit - the friendly Code Review server
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qpnp-smb2: update AICL rerun logic for PM660



Current AICL re-run design for PM660 uses AICL restart mechanism
which starts AICL algorithm from Min ICL value to the configure ICL
value one step (25mA) at a time, this adds considerable amount of
delay for algorithm to reach a settled ICL value. Fix this by using
PMI8998 based AICL re-run design.

Change-Id: I84f612c275fa0d9785a6688a56c9da90df1b86d4
Signed-off-by: default avatarAshay Jaiswal <ashayj@codeaurora.org>
parent 60be7160
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+9 −29
Original line number Diff line number Diff line
@@ -1919,8 +1919,6 @@ int smblib_rerun_aicl(struct smb_charger *chg)
		return rc;

	smblib_dbg(chg, PR_MISC, "re-running AICL\n");
	switch (chg->smb_version) {
	case PMI8998_SUBTYPE:
	rc = smblib_get_charge_param(chg, &chg->param.icl_stat,
			&settled_icl_ua);
	if (rc < 0) {
@@ -1932,24 +1930,6 @@ int smblib_rerun_aicl(struct smb_charger *chg)
			max(settled_icl_ua - chg->param.usb_icl.step_u,
				chg->param.usb_icl.step_u));
	vote(chg->usb_icl_votable, AICL_RERUN_VOTER, false, 0);
		break;
	case PM660_SUBTYPE:
		/*
		 * Use restart_AICL instead of trigger_AICL as it runs the
		 * complete AICL instead of starting from the last settled
		 * value.
		 */
		rc = smblib_masked_write(chg, CMD_HVDCP_2_REG,
					RESTART_AICL_BIT, RESTART_AICL_BIT);
		if (rc < 0)
			smblib_err(chg, "Couldn't write to CMD_HVDCP_2_REG rc=%d\n",
									rc);
		break;
	default:
		smblib_dbg(chg, PR_PARALLEL, "unknown SMB chip %d\n",
				chg->smb_version);
		return -EINVAL;
	}

	return 0;
}