Commit ea276176 authored Jul 16, 2013 by Subash Patel Committed by Kukjin Kim Jul 16, 2013

ARM: EXYNOS: change the PHYSMEM_BITS and SECTION_SIZE



On EXYNOS5440 there is DRAM on the 36-bit address range. Hence
this patch converts the MAX_PHYSMEM_BITS macro to 36 if LPAE is
enabled for the ARM architecture.

The conventional section size on EXYNOS is 256M due to sparsemem.
Since EXYNOS5440 has memory in multiples of 1G in 32-bit and 36-bit
range, this has now been modified to 31.

Signed-off-by: Subash Patel <subash.rp@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>

parent e085cad6

arch/arm/mach-exynos/include/mach/memory.h

+5 −0

Original line number	Original line	Diff line number	Diff line
	@@ -15,8 +15,13 @@

	#define PLAT_PHYS_OFFSET UL(0x40000000)		#define PLAT_PHYS_OFFSET UL(0x40000000)

			#ifndef CONFIG_ARM_LPAE
	/* Maximum of 256MiB in one bank */		/* Maximum of 256MiB in one bank */
	#define MAX_PHYSMEM_BITS 32		#define MAX_PHYSMEM_BITS 32
	#define SECTION_SIZE_BITS 28		#define SECTION_SIZE_BITS 28
			#else
			#define MAX_PHYSMEM_BITS 36
			#define SECTION_SIZE_BITS 31
			#endif

	#endif /* __ASM_ARCH_MEMORY_H */		#endif /* __ASM_ARCH_MEMORY_H */