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Commit e9d57102 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'v4.1-next-soc' of https://github.com/mbgg/linux-mediatek into fixes

These are bug fixes for mediatek, fixing code that was recently introduced.

- pmic wrapper: fix clock handling
- pmic wrapper: fix state machine
- pmic wrapper: fix compile dependency

* tag 'v4.1-next-soc' of https://github.com/mbgg/linux-mediatek:
  soc: mediatek: Add compile dependency to pmic-wrapper
  soc: mediatek: PMIC wrap: Fix register state machine handling
  soc: mediatek: PMIC wrap: Fix clock rate handling
parents c65b99f0 2a910d13
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+1 −0
Original line number Diff line number Diff line
@@ -4,6 +4,7 @@
config MTK_PMIC_WRAP
	tristate "MediaTek PMIC Wrapper Support"
	depends on ARCH_MEDIATEK
	depends on RESET_CONTROLLER
	select REGMAP
	help
	  Say yes here to add support for MediaTek PMIC Wrapper found
+9 −45
Original line number Diff line number Diff line
@@ -443,11 +443,6 @@ static int pwrap_wait_for_state(struct pmic_wrapper *wrp,
static int pwrap_write(struct pmic_wrapper *wrp, u32 adr, u32 wdata)
{
	int ret;
	u32 val;

	val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
	if (PWRAP_GET_WACS_FSM(val) == PWRAP_WACS_FSM_WFVLDCLR)
		pwrap_writel(wrp, 1, PWRAP_WACS2_VLDCLR);

	ret = pwrap_wait_for_state(wrp, pwrap_is_fsm_idle);
	if (ret)
@@ -462,11 +457,6 @@ static int pwrap_write(struct pmic_wrapper *wrp, u32 adr, u32 wdata)
static int pwrap_read(struct pmic_wrapper *wrp, u32 adr, u32 *rdata)
{
	int ret;
	u32 val;

	val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
	if (PWRAP_GET_WACS_FSM(val) == PWRAP_WACS_FSM_WFVLDCLR)
		pwrap_writel(wrp, 1, PWRAP_WACS2_VLDCLR);

	ret = pwrap_wait_for_state(wrp, pwrap_is_fsm_idle);
	if (ret)
@@ -480,6 +470,8 @@ static int pwrap_read(struct pmic_wrapper *wrp, u32 adr, u32 *rdata)

	*rdata = PWRAP_GET_WACS_RDATA(pwrap_readl(wrp, PWRAP_WACS2_RDATA));

	pwrap_writel(wrp, 1, PWRAP_WACS2_VLDCLR);

	return 0;
}

@@ -563,45 +555,17 @@ static int pwrap_init_sidly(struct pmic_wrapper *wrp)

static int pwrap_init_reg_clock(struct pmic_wrapper *wrp)
{
	unsigned long rate_spi;
	int ck_mhz;

	rate_spi = clk_get_rate(wrp->clk_spi);

	if (rate_spi > 26000000)
		ck_mhz = 26;
	else if (rate_spi > 18000000)
		ck_mhz = 18;
	else
		ck_mhz = 0;

	switch (ck_mhz) {
	case 18:
		if (pwrap_is_mt8135(wrp))
			pwrap_writel(wrp, 0xc, PWRAP_CSHEXT);
		pwrap_writel(wrp, 0x4, PWRAP_CSHEXT_WRITE);
		pwrap_writel(wrp, 0xc, PWRAP_CSHEXT_READ);
		pwrap_writel(wrp, 0x0, PWRAP_CSLEXT_START);
		pwrap_writel(wrp, 0x0, PWRAP_CSLEXT_END);
		break;
	case 26:
		if (pwrap_is_mt8135(wrp))
	if (pwrap_is_mt8135(wrp)) {
		pwrap_writel(wrp, 0x4, PWRAP_CSHEXT);
		pwrap_writel(wrp, 0x0, PWRAP_CSHEXT_WRITE);
		pwrap_writel(wrp, 0x4, PWRAP_CSHEXT_READ);
		pwrap_writel(wrp, 0x0, PWRAP_CSLEXT_START);
		pwrap_writel(wrp, 0x0, PWRAP_CSLEXT_END);
		break;
	case 0:
		if (pwrap_is_mt8135(wrp))
			pwrap_writel(wrp, 0xf, PWRAP_CSHEXT);
		pwrap_writel(wrp, 0xf, PWRAP_CSHEXT_WRITE);
		pwrap_writel(wrp, 0xf, PWRAP_CSHEXT_READ);
		pwrap_writel(wrp, 0xf, PWRAP_CSLEXT_START);
		pwrap_writel(wrp, 0xf, PWRAP_CSLEXT_END);
		break;
	default:
		return -EINVAL;
	} else {
		pwrap_writel(wrp, 0x0, PWRAP_CSHEXT_WRITE);
		pwrap_writel(wrp, 0x4, PWRAP_CSHEXT_READ);
		pwrap_writel(wrp, 0x2, PWRAP_CSLEXT_START);
		pwrap_writel(wrp, 0x2, PWRAP_CSLEXT_END);
	}

	return 0;