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Commit e8788bab authored by Andrew Victor's avatar Andrew Victor Committed by Russell King
Browse files

[ARM] 4351/1: AT91: Define rest of peripheral clocks 



Define and register the remaining peripheral clocks for the AT91
processors.

AT91SAM9261 clocks patch by Ivan Zhakov.

Signed-off-by: default avatarAndrew Victor <andrew@sanpeople.com>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent ce813b97

arch/arm/mach-at91/at91rm9200.c

+18 −1
Original line number Original line Diff line number Diff line
@@ -117,6 +117,21 @@ static struct clk pioD_clk = { 
	.pmc_mask	= 1 << AT91RM9200_ID_PIOD,

	.pmc_mask	= 1 << AT91RM9200_ID_PIOD,

	.type		= CLK_TYPE_PERIPHERAL,

	.type		= CLK_TYPE_PERIPHERAL,

};

};

static struct clk ssc0_clk = {

	.name		= "ssc0_clk",

	.pmc_mask	= 1 << AT91RM9200_ID_SSC0,

	.type		= CLK_TYPE_PERIPHERAL,

};

static struct clk ssc1_clk = {

	.name		= "ssc1_clk",

	.pmc_mask	= 1 << AT91RM9200_ID_SSC1,

	.type		= CLK_TYPE_PERIPHERAL,

};

static struct clk ssc2_clk = {

	.name		= "ssc2_clk",

	.pmc_mask	= 1 << AT91RM9200_ID_SSC2,

	.type		= CLK_TYPE_PERIPHERAL,

};

static struct clk tc0_clk = {

static struct clk tc0_clk = {

	.name		= "tc0_clk",

	.name		= "tc0_clk",

	.pmc_mask	= 1 << AT91RM9200_ID_TC0,

	.pmc_mask	= 1 << AT91RM9200_ID_TC0,
@@ -161,7 +176,9 @@ static struct clk *periph_clocks[] __initdata = { 
	&udc_clk,

	&udc_clk,

	&twi_clk,

	&twi_clk,

	&spi_clk,

	&spi_clk,

	// ssc 0 .. ssc2

	&ssc0_clk,

	&ssc1_clk,

	&ssc2_clk,

	&tc0_clk,

	&tc0_clk,

	&tc1_clk,

	&tc1_clk,

	&tc2_clk,

	&tc2_clk,

arch/arm/mach-at91/at91sam9260.c

+6 −1
Original line number Original line Diff line number Diff line
@@ -119,6 +119,11 @@ static struct clk spi1_clk = { 
	.pmc_mask	= 1 << AT91SAM9260_ID_SPI1,

	.pmc_mask	= 1 << AT91SAM9260_ID_SPI1,

	.type		= CLK_TYPE_PERIPHERAL,

	.type		= CLK_TYPE_PERIPHERAL,

};

};

static struct clk ssc_clk = {

	.name		= "ssc_clk",

	.pmc_mask	= 1 << AT91SAM9260_ID_SSC,

	.type		= CLK_TYPE_PERIPHERAL,

};

static struct clk tc0_clk = {

static struct clk tc0_clk = {

	.name		= "tc0_clk",

	.name		= "tc0_clk",

	.pmc_mask	= 1 << AT91SAM9260_ID_TC0,

	.pmc_mask	= 1 << AT91SAM9260_ID_TC0,
@@ -193,7 +198,7 @@ static struct clk *periph_clocks[] __initdata = { 
	&twi_clk,

	&twi_clk,

	&spi0_clk,

	&spi0_clk,

	&spi1_clk,

	&spi1_clk,

	// ssc

	&ssc_clk,

	&tc0_clk,

	&tc0_clk,

	&tc1_clk,

	&tc1_clk,

	&tc2_clk,

	&tc2_clk,

arch/arm/mach-at91/at91sam9261.c

+18 −1
Original line number Original line Diff line number Diff line
@@ -97,6 +97,21 @@ static struct clk spi1_clk = { 
	.pmc_mask	= 1 << AT91SAM9261_ID_SPI1,

	.pmc_mask	= 1 << AT91SAM9261_ID_SPI1,

	.type		= CLK_TYPE_PERIPHERAL,

	.type		= CLK_TYPE_PERIPHERAL,

};

};

static struct clk ssc0_clk = {

	.name		= "ssc0_clk",

	.pmc_mask	= 1 << AT91SAM9261_ID_SSC0,

	.type		= CLK_TYPE_PERIPHERAL,

};

static struct clk ssc1_clk = {

	.name		= "ssc1_clk",

	.pmc_mask	= 1 << AT91SAM9261_ID_SSC1,

	.type		= CLK_TYPE_PERIPHERAL,

};

static struct clk ssc2_clk = {

	.name		= "ssc2_clk",

	.pmc_mask	= 1 << AT91SAM9261_ID_SSC2,

	.type		= CLK_TYPE_PERIPHERAL,

};

static struct clk tc0_clk = {

static struct clk tc0_clk = {

	.name		= "tc0_clk",

	.name		= "tc0_clk",

	.pmc_mask	= 1 << AT91SAM9261_ID_TC0,

	.pmc_mask	= 1 << AT91SAM9261_ID_TC0,
@@ -135,7 +150,9 @@ static struct clk *periph_clocks[] __initdata = { 
	&twi_clk,

	&twi_clk,

	&spi0_clk,

	&spi0_clk,

	&spi1_clk,

	&spi1_clk,

	// ssc 0 .. ssc2

	&ssc0_clk,

	&ssc1_clk,

	&ssc2_clk,

	&tc0_clk,

	&tc0_clk,

	&tc1_clk,

	&tc1_clk,

	&tc2_clk,

	&tc2_clk,

arch/arm/mach-at91/at91sam9263.c

+42 −6
Original line number Original line Diff line number Diff line
@@ -87,6 +87,11 @@ static struct clk mmc1_clk = { 
	.pmc_mask	= 1 << AT91SAM9263_ID_MCI1,

	.pmc_mask	= 1 << AT91SAM9263_ID_MCI1,

	.type		= CLK_TYPE_PERIPHERAL,

	.type		= CLK_TYPE_PERIPHERAL,

};

};

static struct clk can_clk = {

	.name		= "can_clk",

	.pmc_mask	= 1 << AT91SAM9263_ID_CAN,

	.type		= CLK_TYPE_PERIPHERAL,

};

static struct clk twi_clk = {

static struct clk twi_clk = {

	.name		= "twi_clk",

	.name		= "twi_clk",

	.pmc_mask	= 1 << AT91SAM9263_ID_TWI,

	.pmc_mask	= 1 << AT91SAM9263_ID_TWI,
@@ -102,16 +107,46 @@ static struct clk spi1_clk = { 
	.pmc_mask	= 1 << AT91SAM9263_ID_SPI1,

	.pmc_mask	= 1 << AT91SAM9263_ID_SPI1,

	.type		= CLK_TYPE_PERIPHERAL,

	.type		= CLK_TYPE_PERIPHERAL,

};

};

static struct clk ssc0_clk = {

	.name		= "ssc0_clk",

	.pmc_mask	= 1 << AT91SAM9263_ID_SSC0,

	.type		= CLK_TYPE_PERIPHERAL,

};

static struct clk ssc1_clk = {

	.name		= "ssc1_clk",

	.pmc_mask	= 1 << AT91SAM9263_ID_SSC1,

	.type		= CLK_TYPE_PERIPHERAL,

};

static struct clk ac97_clk = {

	.name		= "ac97_clk",

	.pmc_mask	= 1 << AT91SAM9263_ID_AC97C,

	.type		= CLK_TYPE_PERIPHERAL,

};

static struct clk tcb_clk = {

static struct clk tcb_clk = {

	.name		= "tcb_clk",

	.name		= "tcb_clk",

	.pmc_mask	= 1 << AT91SAM9263_ID_TCB,

	.pmc_mask	= 1 << AT91SAM9263_ID_TCB,

	.type		= CLK_TYPE_PERIPHERAL,

	.type		= CLK_TYPE_PERIPHERAL,

};

};

static struct clk pwmc_clk = {

	.name		= "pwmc_clk",

	.pmc_mask	= 1 << AT91SAM9263_ID_PWMC,

	.type		= CLK_TYPE_PERIPHERAL,

};

static struct clk macb_clk = {

static struct clk macb_clk = {

	.name		= "macb_clk",

	.name		= "macb_clk",

	.pmc_mask	= 1 << AT91SAM9263_ID_EMAC,

	.pmc_mask	= 1 << AT91SAM9263_ID_EMAC,

	.type		= CLK_TYPE_PERIPHERAL,

	.type		= CLK_TYPE_PERIPHERAL,

};

};

static struct clk dma_clk = {

	.name		= "dma_clk",

	.pmc_mask	= 1 << AT91SAM9263_ID_DMA,

	.type		= CLK_TYPE_PERIPHERAL,

};

static struct clk twodge_clk = {

	.name		= "2dge_clk",

	.pmc_mask	= 1 << AT91SAM9263_ID_2DGE,

	.type		= CLK_TYPE_PERIPHERAL,

};

static struct clk udc_clk = {

static struct clk udc_clk = {

	.name		= "udc_clk",

	.name		= "udc_clk",

	.pmc_mask	= 1 << AT91SAM9263_ID_UDP,

	.pmc_mask	= 1 << AT91SAM9263_ID_UDP,
@@ -142,20 +177,21 @@ static struct clk *periph_clocks[] __initdata = { 
	&usart2_clk,

	&usart2_clk,

	&mmc0_clk,

	&mmc0_clk,

	&mmc1_clk,

	&mmc1_clk,

	// can

	&can_clk,

	&twi_clk,

	&twi_clk,

	&spi0_clk,

	&spi0_clk,

	&spi1_clk,

	&spi1_clk,

	// ssc0 .. ssc1

	&ssc0_clk,

	// ac97

	&ssc1_clk,

	&ac97_clk,

	&tcb_clk,

	&tcb_clk,

	// pwmc

	&pwmc_clk,

	&macb_clk,

	&macb_clk,

	// 2dge

	&twodge_clk,

	&udc_clk,

	&udc_clk,

	&isi_clk,

	&isi_clk,

	&lcdc_clk,

	&lcdc_clk,

	// dma

	&dma_clk,

	&ohci_clk,

	&ohci_clk,

	// irq0 .. irq1

	// irq0 .. irq1

};

};