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Commit e4d2402b authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: Enable VDD_APC CPR aging for msmcobalt v2"

parents 34c43886 120ff467

arch/arm/boot/dts/qcom/msmcobalt-v2.dtsi

+46 −42
Original line number Diff line number Diff line
@@ -441,40 +441,40 @@ 
		<40000 24000 0 30000>,

		<40000 24000 0 30000>,

		<40000 24000 0 30000>,

		<40000 24000 0 30000>,

		<40000 24000 0 30000>,

		<40000 24000 0 30000>,

		<40000 24000 0 30000>,

		<40000 24000 0 30000>,

		<25000 9000 (-15000) 15000>,

		<25000 9000 (-15000) 15000>,

		<25000 9000 (-15000) 15000>,

		<25000 9000 (-15000) 15000>,

		<25000 9000 (-15000) 15000>,

		/* Speed bin 1 */

		<40000 24000 0 30000>,

		<40000 24000 0 30000>,

		<40000 24000 0 30000>,

		<40000 24000 0 30000>,

		<40000 24000 0 30000>,

		<40000 24000 0 30000>,

		<40000 24000 0 30000>,

		<40000 24000 0 30000>;

		<25000 9000 (-15000) 15000>,

		<25000 9000 (-15000) 15000>,

		<25000 9000 (-15000) 15000>,

		<25000 9000 (-15000) 15000>,

		<25000 9000 (-15000) 15000>;



	qcom,cpr-closed-loop-voltage-fuse-adjustment =

		/* Speed bin 0 */

		<20000 26000 0 30000>,

		<20000 26000 0 30000>,

		<20000 26000 0 30000>,

		<20000 26000 0 30000>,

		<20000 26000 0 30000>,

		<20000 26000 0 30000>,

		<20000 26000 0 30000>,

		<20000 26000 0 30000>,

		<5000 11000 (-15000) 15000>,

		<5000 11000 (-15000) 15000>,

		<5000 11000 (-15000) 15000>,

		<5000 11000 (-15000) 15000>,

		<5000 11000 (-15000) 15000>,

		/* Speed bin 1 */

		<20000 26000 0 30000>,

		<20000 26000 0 30000>,

		<20000 26000 0 30000>,

		<20000 26000 0 30000>,

		<20000 26000 0 30000>,

		<20000 26000 0 30000>,

		<20000 26000 0 30000>,

		<20000 26000 0 30000>;

		<5000 11000 (-15000) 15000>,

		<5000 11000 (-15000) 15000>,

		<5000 11000 (-15000) 15000>,

		<5000 11000 (-15000) 15000>,

		<5000 11000 (-15000) 15000>;



	qcom,allow-voltage-interpolation;

	qcom,allow-quotient-interpolation;
@@ -482,7 +482,9 @@ 


	qcom,cpr-aging-ref-corner = <22 22>;

	qcom,cpr-aging-ro-scaling-factor = <1620>;

	qcom,allow-aging-voltage-adjustment = <0>;

	qcom,allow-aging-voltage-adjustment =

		<0 0 0 1 1 1 1 1>,

		<0 0 0 1 1 1 1 1>;

};



&apc1_cpr {
@@ -602,40 +604,40 @@ 
		<8000 0 0 52000>,

		<8000 0 0 52000>,

		<8000 0 0 52000>,

		<8000 0 0 52000>,

		<8000 0 0 52000>,

		<8000 0 0 52000>,

		<8000 0 0 52000>,

		<8000 0 0 52000>,

		<(-7000) (-15000) (-15000) 37000>,

		<(-7000) (-15000) (-15000) 37000>,

		<(-7000) (-15000) (-15000) 37000>,

		<(-7000) (-15000) (-15000) 37000>,

		<(-7000) (-15000) (-15000) 37000>,

		/* Speed bin 1 */

		<8000 0 0 52000>,

		<8000 0 0 52000>,

		<8000 0 0 52000>,

		<8000 0 0 52000>,

		<8000 0 0 52000>,

		<8000 0 0 52000>,

		<8000 0 0 52000>,

		<8000 0 0 52000>;

		<(-7000) (-15000) (-15000) 37000>,

		<(-7000) (-15000) (-15000) 37000>,

		<(-7000) (-15000) (-15000) 37000>,

		<(-7000) (-15000) (-15000) 37000>,

		<(-7000) (-15000) (-15000) 37000>;



	qcom,cpr-closed-loop-voltage-fuse-adjustment =

		/* Speed bin 0 */

		<0 0 0 50000>,

		<0 0 0 50000>,

		<0 0 0 50000>,

		<0 0 0 50000>,

		<0 0 0 50000>,

		<0 0 0 50000>,

		<0 0 0 50000>,

		<0 0 0 50000>,

		<(-15000) (-15000) (-15000) 35000>,

		<(-15000) (-15000) (-15000) 35000>,

		<(-15000) (-15000) (-15000) 35000>,

		<(-15000) (-15000) (-15000) 35000>,

		<(-15000) (-15000) (-15000) 35000>,

		/* Speed bin 1 */

		<0 0 0 50000>,

		<0 0 0 50000>,

		<0 0 0 50000>,

		<0 0 0 50000>,

		<0 0 0 50000>,

		<0 0 0 50000>,

		<0 0 0 50000>,

		<0 0 0 50000>;

		<(-15000) (-15000) (-15000) 35000>,

		<(-15000) (-15000) (-15000) 35000>,

		<(-15000) (-15000) (-15000) 35000>,

		<(-15000) (-15000) (-15000) 35000>,

		<(-15000) (-15000) (-15000) 35000>;



	qcom,allow-voltage-interpolation;

	qcom,allow-quotient-interpolation;
@@ -643,7 +645,9 @@ 


	qcom,cpr-aging-ref-corner = <30 26>;

	qcom,cpr-aging-ro-scaling-factor = <1700>;

	qcom,allow-aging-voltage-adjustment = <0>;

	qcom,allow-aging-voltage-adjustment =

		<0 0 0 1 1 1 1 1>,

		<0 0 0 1 1 1 1 1>;

};



&pm8005_s1 {