Merge "ARM: dts: msm: Add qrng device node for SDM630"

		qcom,not-wakeup; /* Needed until Full-boot-chain enabled */

		status = "ok";

	};

	qcom_seecom: qseecom@86d00000 {

		compatible = "qcom,qseecom";

		reg = <0x86d00000 0x2200000>;

		reg-names = "secapp-region";

		qcom,hlos-num-ce-hw-instances = <1>;

		qcom,hlos-ce-hw-instance = <0>;

		qcom,qsee-ce-hw-instance = <0>;

		qcom,disk-encrypt-pipe-pair = <2>;

		qcom,support-fde;

		qcom,no-clock-support;

		qcom,msm-bus,name = "qseecom-noc";

		qcom,msm-bus,num-cases = <4>;

		qcom,msm-bus,num-paths = <1>;

		qcom,msm-bus,vectors-KBps =

			<55 512 0 0>,

			<55 512 200000 400000>,

			<55 512 300000 800000>,

			<55 512 400000 1000000>;

		clock-names = "core_clk_src", "core_clk",

				"iface_clk", "bus_clk";

		clocks = <&clock_rpmcc QSEECOM_CE1_CLK>,

			<&clock_rpmcc QSEECOM_CE1_CLK>,

			<&clock_rpmcc QSEECOM_CE1_CLK>,

			<&clock_rpmcc QSEECOM_CE1_CLK>;

		qcom,ce-opp-freq = <171430000>;

		qcom,qsee-reentrancy-support = <2>;

	};

	qcom_cedev: qcedev@1de0000{

		compatible = "qcom,qcedev";

		reg = <0x1de0000 0x20000>,

			<0x1dc4000 0x24000>;

		reg-names = "crypto-base","crypto-bam-base";

		interrupts = <0 206 0>;

		qcom,bam-pipe-pair = <1>;

		qcom,ce-hw-instance = <0>;

		qcom,ce-device = <0>;

		qcom,ce-hw-shared;

		qcom,bam-ee = <0>;

		qcom,msm-bus,name = "qcedev-noc";

		qcom,msm-bus,num-cases = <2>;

		qcom,msm-bus,num-paths = <1>;

		qcom,msm-bus,vectors-KBps =

				<55 512 0 0>,

				<55 512 393600 393600>;

		clock-names = "core_clk_src", "core_clk",

				"iface_clk", "bus_clk";

		clocks = <&clock_rpmcc QCEDEV_CE1_CLK>,

			<&clock_rpmcc QCEDEV_CE1_CLK>,

			<&clock_rpmcc QCEDEV_CE1_CLK>,

			<&clock_rpmcc QCEDEV_CE1_CLK>;

		qcom,ce-opp-freq = <171430000>;

	};

	qcom_crypto: qcrypto@1de0000 {

		compatible = "qcom,qcrypto";

		reg = <0x1de0000 0x20000>,

			<0x1dc4000 0x24000>;

		reg-names = "crypto-base","crypto-bam-base";

		interrupts = <0 206 0>;

		qcom,bam-pipe-pair = <2>;

		qcom,ce-hw-instance = <0>;

		qcom,ce-device = <0>;

		qcom,bam-ee = <0>;

		qcom,ce-hw-shared;

		qcom,clk-mgmt-sus-res;

		qcom,msm-bus,name = "qcrypto-noc";

		qcom,msm-bus,num-cases = <2>;

		qcom,msm-bus,num-paths = <1>;

		qcom,msm-bus,vectors-KBps =

			<55 512 0 0>,

			<55 512 393600 393600>;

		clock-names = "core_clk_src", "core_clk",

				"iface_clk", "bus_clk";

		clocks = <&clock_rpmcc QCRYPTO_CE1_CLK>,

			<&clock_rpmcc QCRYPTO_CE1_CLK>,

			<&clock_rpmcc QCRYPTO_CE1_CLK>,

			<&clock_rpmcc QCRYPTO_CE1_CLK>;

		qcom,ce-opp-freq = <171430000>;

		qcom,use-sw-aes-cbc-ecb-ctr-algo;

		qcom,use-sw-aes-xts-algo;

		qcom,use-sw-aes-ccm-algo;

		qcom,use-sw-ahash-algo;

		qcom,use-sw-aead-algo;

		qcom,use-sw-hmac-algo;

	};

	qcom_tzlog: tz-log@146bf720 {

		compatible = "qcom,tz-log";

		reg = <0x146bf720 0x3000>;

		qcom,hyplog-enabled;

		hyplog-address-offset = <0x410>;

		hyplog-size-offset = <0x414>;

	};

	qcom_rng: qrng@793000 {

		compatible = "qcom,msm-rng";

		reg = <0x793000 0x1000>;

		qcom,msm-rng-iface-clk;

		qcom,no-qrng-config;

		qcom,msm-bus,name = "msm-rng-noc";

		qcom,msm-bus,num-cases = <2>;

		qcom,msm-bus,num-paths = <1>;

		qcom,msm-bus,vectors-KBps =

			<1 618 0 0>,    /* No vote */

			<1 618 0 800>;  /* 100 KHz */

		clocks = <&clock_gcc GCC_PRNG_AHB_CLK>;

		clock-names = "iface_clk";

	};

};

#include "sdm630-ion.dtsi"