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Commit e2a9e5ad authored by Paul Burton's avatar Paul Burton
Browse files

MIPS: add kmap_noncoherent to wire a cached non-coherent TLB entry 



This is identical to kmap_coherent apart from the cache coherency
attribute used for the TLB entry, so kmap_coherent is abstracted to
kmap_prot which is then called for both kmap_coherent &
kmap_noncoherent. This will be used by a subsequent patch.

Suggested-by: default avatarLeonid Yegoshin <leonid.yegoshin@imgtec.com>
Signed-off-by: default avatarPaul Burton <paul.burton@imgtec.com>
parent 76ae6584

arch/mips/include/asm/cacheflush.h

+6 −0
Original line number Original line Diff line number Diff line
@@ -113,6 +113,12 @@ unsigned long run_uncached(void *func); 




extern void *kmap_coherent(struct page *page, unsigned long addr);

extern void *kmap_coherent(struct page *page, unsigned long addr);

extern void kunmap_coherent(void);

extern void kunmap_coherent(void);

extern void *kmap_noncoherent(struct page *page, unsigned long addr);



static inline void kunmap_noncoherent(void)

{

	kunmap_coherent();

}





#define ARCH_HAS_FLUSH_KERNEL_DCACHE_PAGE

#define ARCH_HAS_FLUSH_KERNEL_DCACHE_PAGE

static inline void flush_kernel_dcache_page(struct page *page)

static inline void flush_kernel_dcache_page(struct page *page)

arch/mips/include/asm/pgtable.h

+2 −0
Original line number Original line Diff line number Diff line
@@ -32,6 +32,8 @@ struct vm_area_struct; 
				 _page_cachable_default)

				 _page_cachable_default)

#define PAGE_KERNEL	__pgprot(_PAGE_PRESENT | __READABLE | __WRITEABLE | \

#define PAGE_KERNEL	__pgprot(_PAGE_PRESENT | __READABLE | __WRITEABLE | \

				 _PAGE_GLOBAL | _page_cachable_default)

				 _PAGE_GLOBAL | _page_cachable_default)

#define PAGE_KERNEL_NC	__pgprot(_PAGE_PRESENT | __READABLE | __WRITEABLE | \

				 _PAGE_GLOBAL | _CACHE_CACHABLE_NONCOHERENT)

#define PAGE_USERIO	__pgprot(_PAGE_PRESENT | (cpu_has_rixi ? 0 : _PAGE_READ) | _PAGE_WRITE | \

#define PAGE_USERIO	__pgprot(_PAGE_PRESENT | (cpu_has_rixi ? 0 : _PAGE_READ) | _PAGE_WRITE | \

				 _page_cachable_default)

				 _page_cachable_default)

#define PAGE_KERNEL_UNCACHED __pgprot(_PAGE_PRESENT | __READABLE | \

#define PAGE_KERNEL_UNCACHED __pgprot(_PAGE_PRESENT | __READABLE | \

arch/mips/mm/init.c

+12 −2
Original line number Original line Diff line number Diff line
@@ -114,7 +114,7 @@ static void __init kmap_coherent_init(void) 
static inline void kmap_coherent_init(void) {}

static inline void kmap_coherent_init(void) {}

#endif

#endif





void *kmap_coherent(struct page *page, unsigned long addr)

static void *__kmap_pgprot(struct page *page, unsigned long addr, pgprot_t prot)

{

{

	enum fixed_addresses idx;

	enum fixed_addresses idx;

	unsigned long vaddr, flags, entrylo;

	unsigned long vaddr, flags, entrylo;
@@ -133,7 +133,7 @@ void *kmap_coherent(struct page *page, unsigned long addr) 
	idx += in_interrupt() ? FIX_N_COLOURS : 0;

	idx += in_interrupt() ? FIX_N_COLOURS : 0;

#endif

#endif

	vaddr = __fix_to_virt(FIX_CMAP_END - idx);

	vaddr = __fix_to_virt(FIX_CMAP_END - idx);

	pte = mk_pte(page, PAGE_KERNEL);

	pte = mk_pte(page, prot);

#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32)

#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32)

	entrylo = pte.pte_high;

	entrylo = pte.pte_high;

#else

#else
@@ -171,6 +171,16 @@ void *kmap_coherent(struct page *page, unsigned long addr) 
	return (void*) vaddr;

	return (void*) vaddr;

}

}





void *kmap_coherent(struct page *page, unsigned long addr)

{

	return __kmap_pgprot(page, addr, PAGE_KERNEL);

}



void *kmap_noncoherent(struct page *page, unsigned long addr)

{

	return __kmap_pgprot(page, addr, PAGE_KERNEL_NC);

}



void kunmap_coherent(void)

void kunmap_coherent(void)

{

{

#ifndef CONFIG_MIPS_MT_SMTC

#ifndef CONFIG_MIPS_MT_SMTC