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Commit e1749a75 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'imx-fixes-4.2' of... 

Merge tag 'imx-fixes-4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into fixes

Merge "ARM: imx: fixes for 4.2" from Shawn Guo:

The i.MX fixes for 4.2:
 - Correct compatible string for i.MX27 GPT which actually shares the
   same programming model as i.MX21 GPT rather than i.MX1 one.
 - Add missing #io-channel-cells property for i.MX23 LRADC device, which
   is required for the device to be an IIO provider.
 - Correct HSYNC/VSYNC pins and add ddc-i2c-bus property for TVE device
   on imx53-qsb to work properly.
 - Always enable PU domain if CONFIG_PM is not set.  This fixes a couple
   of failure scenarios which will hang the system if one of the devices
   in the PU domain is accessed.

* tag 'imx-fixes-4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux

:
  ARM: imx6: gpc: always enable PU domain if CONFIG_PM is not set
  ARM: dts: imx53-qsb: fix TVE entry
  ARM: dts: mx23: fix iio-hwmon support
  ARM: dts: imx27: Adjust the GPT compatible string

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents cde137aa d438462c

arch/arm/boot/dts/imx23.dtsi

+1 −0
Original line number Diff line number Diff line
@@ -468,6 +468,7 @@ 
				interrupts = <36 37 38 39 40 41 42 43 44>;

				status = "disabled";

				clocks = <&clks 26>;

				#io-channel-cells = <1>;

			};



			spdif@80054000 {

arch/arm/boot/dts/imx27.dtsi

+6 −6
Original line number Diff line number Diff line
@@ -108,7 +108,7 @@ 
			};



			gpt1: timer@10003000 {

				compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";

				compatible = "fsl,imx27-gpt", "fsl,imx21-gpt";

				reg = <0x10003000 0x1000>;

				interrupts = <26>;

				clocks = <&clks IMX27_CLK_GPT1_IPG_GATE>,
@@ -117,7 +117,7 @@ 
			};



			gpt2: timer@10004000 {

				compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";

				compatible = "fsl,imx27-gpt", "fsl,imx21-gpt";

				reg = <0x10004000 0x1000>;

				interrupts = <25>;

				clocks = <&clks IMX27_CLK_GPT2_IPG_GATE>,
@@ -126,7 +126,7 @@ 
			};



			gpt3: timer@10005000 {

				compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";

				compatible = "fsl,imx27-gpt", "fsl,imx21-gpt";

				reg = <0x10005000 0x1000>;

				interrupts = <24>;

				clocks = <&clks IMX27_CLK_GPT3_IPG_GATE>,
@@ -376,7 +376,7 @@ 
			};



			gpt4: timer@10019000 {

				compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";

				compatible = "fsl,imx27-gpt", "fsl,imx21-gpt";

				reg = <0x10019000 0x1000>;

				interrupts = <4>;

				clocks = <&clks IMX27_CLK_GPT4_IPG_GATE>,
@@ -385,7 +385,7 @@ 
			};



			gpt5: timer@1001a000 {

				compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";

				compatible = "fsl,imx27-gpt", "fsl,imx21-gpt";

				reg = <0x1001a000 0x1000>;

				interrupts = <3>;

				clocks = <&clks IMX27_CLK_GPT5_IPG_GATE>,
@@ -436,7 +436,7 @@ 
			};



			gpt6: timer@1001f000 {

				compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";

				compatible = "fsl,imx27-gpt", "fsl,imx21-gpt";

				reg = <0x1001f000 0x1000>;

				interrupts = <2>;

				clocks = <&clks IMX27_CLK_GPT6_IPG_GATE>,

arch/arm/boot/dts/imx53-qsb-common.dtsi

+3 −2
Original line number Diff line number Diff line
@@ -295,9 +295,10 @@ 
&tve {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_vga_sync>;

	ddc-i2c-bus = <&i2c2>;

	fsl,tve-mode = "vga";

	fsl,hsync-pin = <4>;

	fsl,vsync-pin = <6>;

	fsl,hsync-pin = <7>;	/* IPU DI1 PIN7 via EIM_OE */

	fsl,vsync-pin = <8>;	/* IPU DI1 PIN8 via EIM_RW */

	status = "okay";

};

arch/arm/mach-imx/gpc.c

+6 −21
Original line number Diff line number Diff line
@@ -291,8 +291,6 @@ void __init imx_gpc_check_dt(void) 
	}

}



#ifdef CONFIG_PM_GENERIC_DOMAINS



static void _imx6q_pm_pu_power_off(struct generic_pm_domain *genpd)

{

	int iso, iso2sw;
@@ -399,7 +397,6 @@ static struct genpd_onecell_data imx_gpc_onecell_data = { 
static int imx_gpc_genpd_init(struct device *dev, struct regulator *pu_reg)

{

	struct clk *clk;

	bool is_off;

	int i;



	imx6q_pu_domain.reg = pu_reg;
@@ -416,18 +413,13 @@ static int imx_gpc_genpd_init(struct device *dev, struct regulator *pu_reg) 
	}

	imx6q_pu_domain.num_clks = i;



	is_off = IS_ENABLED(CONFIG_PM);

	if (is_off) {

		_imx6q_pm_pu_power_off(&imx6q_pu_domain.base);

	} else {

		/*

		 * Enable power if compiled without CONFIG_PM in case the

		 * bootloader disabled it.

		 */

	/* Enable power always in case bootloader disabled it. */

	imx6q_pm_pu_power_on(&imx6q_pu_domain.base);

	}



	pm_genpd_init(&imx6q_pu_domain.base, NULL, is_off);

	if (!IS_ENABLED(CONFIG_PM_GENERIC_DOMAINS))

		return 0;



	pm_genpd_init(&imx6q_pu_domain.base, NULL, false);

	return of_genpd_add_provider_onecell(dev->of_node,

					     &imx_gpc_onecell_data);
@@ -437,13 +429,6 @@ clk_err: 
	return -EINVAL;

}



#else

static inline int imx_gpc_genpd_init(struct device *dev, struct regulator *reg)

{

	return 0;

}

#endif /* CONFIG_PM_GENERIC_DOMAINS */



static int imx_gpc_probe(struct platform_device *pdev)

{

	struct regulator *pu_reg;