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Commit e03e8ddb authored by Dan Carpenter's avatar Dan Carpenter Committed by John W. Linville
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b43: N-PHY: fix gain in b43_nphy_get_gain_ctl_workaround_ent()



There were no break statements in this switch statement so everything
used the default settings.  Per Walter Harms's suggestion, I've replaced
the switch statement and done a little cleanup.

Signed-off-by: default avatarDan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent 708d019f
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+8 −22
Original line number Original line Diff line number Diff line
@@ -3226,8 +3226,6 @@ struct nphy_gain_ctl_workaround_entry *b43_nphy_get_gain_ctl_workaround_ent(
{
{
	struct nphy_gain_ctl_workaround_entry *e;
	struct nphy_gain_ctl_workaround_entry *e;
	u8 phy_idx;
	u8 phy_idx;
	u8 tr_iso = ghz5 ? dev->dev->bus_sprom->fem.ghz5.tr_iso :
			   dev->dev->bus_sprom->fem.ghz2.tr_iso;


	if (!ghz5 && dev->phy.rev >= 6 && dev->phy.radio_rev == 11)
	if (!ghz5 && dev->phy.rev >= 6 && dev->phy.radio_rev == 11)
		return &nphy_gain_ctl_wa_phy6_radio11_ghz2;
		return &nphy_gain_ctl_wa_phy6_radio11_ghz2;
@@ -3249,6 +3247,10 @@ struct nphy_gain_ctl_workaround_entry *b43_nphy_get_gain_ctl_workaround_ent(
		    !b43_channel_type_is_40mhz(dev->phy.channel_type))
		    !b43_channel_type_is_40mhz(dev->phy.channel_type))
			e->cliplo_gain = 0x2d;
			e->cliplo_gain = 0x2d;
	} else if (!ghz5 && dev->phy.rev >= 5) {
	} else if (!ghz5 && dev->phy.rev >= 5) {
		static const int gain_data[] = {0x0062, 0x0064, 0x006a, 0x106a,
						0x106c, 0x1074, 0x107c, 0x207c};
		u8 tr_iso = dev->dev->bus_sprom->fem.ghz2.tr_iso;

		if (ext_lna) {
		if (ext_lna) {
			e->rfseq_init[0] &= ~0x4000;
			e->rfseq_init[0] &= ~0x4000;
			e->rfseq_init[1] &= ~0x4000;
			e->rfseq_init[1] &= ~0x4000;
@@ -3256,26 +3258,10 @@ struct nphy_gain_ctl_workaround_entry *b43_nphy_get_gain_ctl_workaround_ent(
			e->rfseq_init[3] &= ~0x4000;
			e->rfseq_init[3] &= ~0x4000;
			e->init_gain &= ~0x4000;
			e->init_gain &= ~0x4000;
		}
		}
		switch (tr_iso) {
		if (tr_iso > 7)
		case 0:
			tr_iso = 3;
			e->cliplo_gain = 0x0062;
		e->cliplo_gain = gain_data[tr_iso];
		case 1:

			e->cliplo_gain = 0x0064;
		case 2:
			e->cliplo_gain = 0x006a;
		case 3:
			e->cliplo_gain = 0x106a;
		case 4:
			e->cliplo_gain = 0x106c;
		case 5:
			e->cliplo_gain = 0x1074;
		case 6:
			e->cliplo_gain = 0x107c;
		case 7:
			e->cliplo_gain = 0x207c;
		default:
			e->cliplo_gain = 0x106a;
		}
	} else if (ghz5 && dev->phy.rev == 4 && ext_lna) {
	} else if (ghz5 && dev->phy.rev == 4 && ext_lna) {
		e->rfseq_init[0] &= ~0x4000;
		e->rfseq_init[0] &= ~0x4000;
		e->rfseq_init[1] &= ~0x4000;
		e->rfseq_init[1] &= ~0x4000;