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Commit df8ba0ff authored by Viresh Kumar's avatar Viresh Kumar Committed by Alex Shi
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PM / OPP: Parse clock-latency and voltage-tolerance for v1 bindings



V2 bindings have better support for clock-latency and voltage-tolerance
and doesn't need special care. To use callbacks, like
dev_pm_opp_get_max_{transition|volt}_latency(), irrespective of the
bindings, the core needs to know clock-latency/voltage-tolerance for the
earlier bindings.

This patch reads clock-latency/voltage-tolerance from the device node,
irrespective of the bindings (to keep it simple) and use them only for
V1 bindings.

Signed-off-by: default avatarViresh Kumar <viresh.kumar@linaro.org>
Reviewed-by: default avatarStephen Boyd <sboyd@codeaurora.org>
Signed-off-by: default avatarRafael J. Wysocki <rafael.j.wysocki@intel.com>
(cherry picked from commit 50f8cfbd5897ca182d43f4caf19937153f17a604)
Signed-off-by: default avatarAlex Shi <alex.shi@linaro.org>
parent 2f5f3fb4
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