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Commit df330515 authored by Laurent Pinchart's avatar Laurent Pinchart Committed by Mauro Carvalho Chehab
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[media] v4l: xilinx: Add Xilinx Video IP core



Xilinx platforms have no hardwired video capture or video processing
interface. Users create capture and memory to memory processing
pipelines in the FPGA fabric to suit their particular needs, by
instantiating video IP cores from a large library.

The Xilinx Video IP core is a framework that models a video pipeline
described in the device tree and expose the pipeline to userspace
through the media controller and V4L2 APIs.

Signed-off-by: default avatarLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: default avatarHyun Kwon <hyun.kwon@xilinx.com>
Signed-off-by: default avatarRadhey Shyam Pandey <radheys@xilinx.com>
Signed-off-by: default avatarMichal Simek <michal.simek@xilinx.com>
Acked-by: default avatarHans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab@osg.samsung.com>
parent c9bca8b3
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DT bindings for Xilinx video IP cores
-------------------------------------

Xilinx video IP cores process video streams by acting as video sinks and/or
sources. They are connected by links through their input and output ports,
creating a video pipeline.

Each video IP core is represented by an AMBA bus child node in the device
tree using bindings documented in this directory. Connections between the IP
cores are represented as defined in ../video-interfaces.txt.

The whole  pipeline is represented by an AMBA bus child node in the device
tree using bindings documented in ./xlnx,video.txt.

Common properties
-----------------

The following properties are common to all Xilinx video IP cores.

- xlnx,video-format: This property represents a video format transmitted on an
  AXI bus between video IP cores, using its VF code as defined in "AXI4-Stream
  Video IP and System Design Guide" [UG934]. How the format relates to the IP
  core is decribed in the IP core bindings documentation.

- xlnx,video-width: This property qualifies the video format with the sample
  width expressed as a number of bits per pixel component. All components must
  use the same width.

- xlnx,cfa-pattern: When the video format is set to Mono/Sensor, this property
  describes the sensor's color filter array pattern. Supported values are
  "bggr", "gbrg", "grbg", "rggb" and "mono". If not specified, the pattern
  defaults to "mono".


[UG934] http://www.xilinx.com/support/documentation/ip_documentation/axi_videoip/v1_0/ug934_axi_videoIP.pdf
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Xilinx Video IP Pipeline (VIPP)
-------------------------------

General concept
---------------

Xilinx video IP pipeline processes video streams through one or more Xilinx
video IP cores. Each video IP core is represented as documented in video.txt
and IP core specific documentation, xlnx,v-*.txt, in this directory. The DT
node of the VIPP represents as a top level node of the pipeline and defines
mappings between DMAs and the video IP cores.

Required properties:

- compatible: Must be "xlnx,video".

- dmas, dma-names: List of one DMA specifier and identifier string (as defined
  in Documentation/devicetree/bindings/dma/dma.txt) per port. Each port
  requires a DMA channel with the identifier string set to "port" followed by
  the port index.

- ports: Video port, using the DT bindings defined in ../video-interfaces.txt.

Required port properties:

- direction: should be either "input" or "output" depending on the direction
  of stream.

Example:

	video_cap {
		compatible = "xlnx,video";
		dmas = <&vdma_1 1>, <&vdma_3 1>;
		dma-names = "port0", "port1";

		ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;
				direction = "input";
				vcap0_in0: endpoint {
					remote-endpoint = <&scaler0_out>;
				};
			};
			port@1 {
				reg = <1>;
				direction = "input";
				vcap0_in1: endpoint {
					remote-endpoint = <&switch_out1>;
				};
			};
		};
	};
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@@ -10818,6 +10818,15 @@ L: linux-serial@vger.kernel.org
S:	Maintained
F:	drivers/tty/serial/uartlite.c

XILINX VIDEO IP CORES
M:	Hyun Kwon <hyun.kwon@xilinx.com>
M:	Laurent Pinchart <laurent.pinchart@ideasonboard.com>
L:	linux-media@vger.kernel.org
T:	git git://linuxtv.org/media_tree.git
S:	Supported
F:	Documentation/devicetree/bindings/media/xilinx/
F:	drivers/media/platform/xilinx/

XILLYBUS DRIVER
M:	Eli Billauer <eli.billauer@gmail.com>
L:	linux-kernel@vger.kernel.org
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@@ -118,6 +118,7 @@ source "drivers/media/platform/soc_camera/Kconfig"
source "drivers/media/platform/exynos4-is/Kconfig"
source "drivers/media/platform/s5p-tv/Kconfig"
source "drivers/media/platform/am437x/Kconfig"
source "drivers/media/platform/xilinx/Kconfig"

endif # V4L_PLATFORM_DRIVERS

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@@ -48,4 +48,6 @@ obj-y += omap/

obj-$(CONFIG_VIDEO_AM437X_VPFE)		+= am437x/

obj-$(CONFIG_VIDEO_XILINX)		+= xilinx/

ccflags-y += -I$(srctree)/drivers/media/i2c
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