Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit dd52d642 authored by Andi Kleen's avatar Andi Kleen Committed by Linus Torvalds
Browse files

[PATCH] x86_64: Remove unused AMD K8 C stepping flag 



X86_FEATURE_K8_C was a synthetic Linux CPUID flag that was used for some
code optimizations in Opteron C stepping or later. But support for pre C
stepping optimizations has been removed, so this isn't needed anymore.

Signed-off-by: default avatarAndi Kleen <ak@suse.de>
Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
parent 2e664aa2

arch/x86_64/kernel/setup.c

+0 −6
Original line number Diff line number Diff line
@@ -879,7 +879,6 @@ static void __init amd_detect_cmp(struct cpuinfo_x86 *c) 
static int __init init_amd(struct cpuinfo_x86 *c)

{

	int r;

	int level;



#ifdef CONFIG_SMP

	unsigned long value;
@@ -902,11 +901,6 @@ static int __init init_amd(struct cpuinfo_x86 *c) 
	   3DNow is IDd by bit 31 in extended CPUID (1*32+31) anyway */

	clear_bit(0*32+31, &c->x86_capability);

	

	/* C-stepping K8? */

	level = cpuid_eax(1);

	if ((level >= 0x0f48 && level < 0x0f50) || level >= 0x0f58)

		set_bit(X86_FEATURE_K8_C, &c->x86_capability);



	r = get_model_name(c);

	if (!r) { 

		switch (c->x86) {

include/asm-x86_64/cpufeature.h

+1 −1
Original line number Diff line number Diff line
@@ -61,7 +61,7 @@ 
#define X86_FEATURE_K6_MTRR	(3*32+ 1) /* AMD K6 nonstandard MTRRs */

#define X86_FEATURE_CYRIX_ARR	(3*32+ 2) /* Cyrix ARRs (= MTRRs) */

#define X86_FEATURE_CENTAUR_MCR	(3*32+ 3) /* Centaur MCRs (= MTRRs) */

#define X86_FEATURE_K8_C	(3*32+ 4) /* C stepping K8 */

/* 4 free */

#define X86_FEATURE_CONSTANT_TSC (3*32+5) /* TSC runs at constant rate */

#define X86_FEATURE_SYNC_RDTSC  (3*32+6)  /* RDTSC syncs CPU core */