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Commit d5b60ee2 authored by Srini Kandagatla's avatar Srini Kandagatla Committed by Kyle Yan
Browse files

fixup rpm clks on 8996 

Change-Id: Ia19aa0ebc209322955da1d22f5eb73c9cd7af908
(cherry picked from commit 6c72267db866b9841312defdf81b100db77a0e71)
Git-commit: 6c72267db866b9841312defdf81b100db77a0e71
Git-repo: https://git.linaro.org/landing-teams/working/qualcomm/kernel.git


Signed-off-by: default avatarSrini Kandagatla <srinivas.kandagatla@hackbox.linaro.org>
Signed-off-by: default avatarTaniya Das <tdas@codeaurora.org>
parent 172a5317

drivers/clk/qcom/clk-smd-rpm.c

+10 −10
Original line number Diff line number Diff line
@@ -491,28 +491,28 @@ DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8996, rf_clk1_pin, rf_clk1_a_pin, 4); 
DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8996, rf_clk2_pin, rf_clk2_a_pin, 5);



static struct clk_smd_rpm *msm8996_clks[] = {

	[RPM_XO_CLK_SRC] = &msm8996_cxo,

	[RPM_XO_A_CLK_SRC] = &msm8996_cxo_a,

	[RPM_SMD_XO_CLK_SRC] = &msm8996_cxo,

	[RPM_SMD_XO_A_CLK_SRC] = &msm8996_cxo_a,

	[RPM_AGGR1_NOC_CLK] = &msm8996_aggre1_noc_clk,

	[RPM_AGGR1_NOC_A_CLK] = &msm8996_aggre1_noc_a_clk,

	[RPM_AGGR2_NOC_CLK] = &msm8996_aggre2_noc_clk,

	[RPM_AGGR2_NOC_A_CLK] = &msm8996_aggre2_noc_a_clk,

	[RPM_PCNOC_CLK] = &msm8996_pcnoc_clk,

	[RPM_PCNOC_A_CLK] = &msm8996_pcnoc_a_clk,

	[RPM_SNOC_CLK] = &msm8996_snoc_clk,

	[RPM_SNOC_A_CLK] = &msm8996_snoc_a_clk,

	[RPM_SMD_PCNOC_CLK] = &msm8996_pcnoc_clk,

	[RPM_SMD_PCNOC_A_CLK] = &msm8996_pcnoc_a_clk,

	[RPM_SMD_SNOC_CLK] = &msm8996_snoc_clk,

	[RPM_SMD_SNOC_A_CLK] = &msm8996_snoc_a_clk,

	[RPM_CNOC_CLK] = &msm8996_cnoc_clk,

	[RPM_CNOC_A_CLK] = &msm8996_cnoc_a_clk,

	[RPM_BIMC_CLK] = &msm8996_bimc_clk,

	[RPM_BIMC_A_CLK] = &msm8996_bimc_a_clk,

	[RPM_SMD_BIMC_CLK] = &msm8996_bimc_clk,

	[RPM_SMD_BIMC_A_CLK] = &msm8996_bimc_a_clk,

	[RPM_MMAXI_CLK] = &msm8996_mmssnoc_axi_rpm_clk,

	[RPM_MMAXI_A_CLK] = &msm8996_mmssnoc_axi_rpm_a_clk,

	[RPM_IPA_CLK] = &msm8996_ipa_clk,

	[RPM_IPA_A_CLK] = &msm8996_ipa_a_clk,

	[RPM_CE1_CLK] = &msm8996_ce1_clk,

	[RPM_CE1_A_CLK] = &msm8996_ce1_a_clk,

	[RPM_QDSS_CLK] = &msm8996_qdss_clk,

	[RPM_QDSS_A_CLK] = &msm8996_qdss_a_clk,

	[RPM_SMD_QDSS_CLK] = &msm8996_qdss_clk,

	[RPM_SMD_QDSS_A_CLK] = &msm8996_qdss_a_clk,

	[RPM_LN_BB_CLK] = &msm8996_ln_bb_clk,

	[RPM_LN_BB_A_CLK] = &msm8996_ln_bb_a_clk,

	[RPM_DIV_CLK1] = &msm8996_div_clk1,