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Commit d41f9b55 authored by Martin Blumenstingl's avatar Martin Blumenstingl Committed by Greg Kroah-Hartman
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clk: meson: clk-pll: fix initializing the old rate (fallback) for a PLL 



[ Upstream commit 2f290b7c67adf6459a17a4c978102af35cd62e4a ]

The "rate" parameter in meson_clk_pll_set_rate() contains the new rate.
Retrieve the old rate with clk_hw_get_rate() so we don't inifinitely try
to switch from the new rate to the same rate again.

Fixes: 7a29a869 ("clk: meson: Add support for Meson clock controller")
Signed-off-by: default avatarMartin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: default avatarJerome Brunet <jbrunet@baylibre.com>
Link: https://lore.kernel.org/r/20201226121556.975418-2-martin.blumenstingl@googlemail.com


Signed-off-by: default avatarSasha Levin <sashal@kernel.org>
parent 340ac692

drivers/clk/meson/clk-pll.c

+1 −1
Original line number Diff line number Diff line
@@ -138,7 +138,7 @@ static int meson_clk_pll_set_rate(struct clk_hw *hw, unsigned long rate, 
	if (parent_rate == 0 || rate == 0)

		return -EINVAL;



	old_rate = rate;

	old_rate = clk_hw_get_rate(hw);



	rate_set = meson_clk_get_pll_settings(pll, rate);

	if (!rate_set)