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Commit cf8812ee authored by Guchun Chen's avatar Guchun Chen
Browse files

clk: qcom: mdss: improve DSI PLL's performance 



To improve performance margin for DSI's PLL at cold temperature case,
the value of DSIPHY_PLL_PLL_ICPMSET should be changed from 0x24 to 0x3f.

Change-Id: I139e37e137355c5e8f0b3bebd28b23a09593dd13
Signed-off-by: default avatarGuchun Chen <guchunc@codeaurora.org>
parent 1707cb3f

drivers/clk/msm/mdss/mdss-dsi-pll-8996-util.c

+3 −3
Original line number Diff line number Diff line 
/* Copyright (c) 2015-2016, The Linux Foundation. All rights reserved.

/* Copyright (c) 2015-2016, 2018 The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and
@@ -403,8 +403,8 @@ static void mdss_dsi_pll_8996_input_init(struct mdss_pll_resources *pll, 
	pdb->in.pll_ip_trim = 4;	/* 4, reg: 0x0404 */

	pdb->in.pll_cpcset_cur = 1;	/* 1, reg: 0x04f0, bit 0 - 2 */

	pdb->in.pll_cpmset_cur = 1;	/* 1, reg: 0x04f0, bit 3 - 5 */

	pdb->in.pll_icpmset = 4;	/* 4, reg: 0x04fc, bit 3 - 5 */

	pdb->in.pll_icpcset = 4;	/* 4, reg: 0x04fc, bit 0 - 2 */

	pdb->in.pll_icpmset = 7;	/* 7, reg: 0x04fc, bit 3 - 5 */

	pdb->in.pll_icpcset = 7;	/* 7, reg: 0x04fc, bit 0 - 2 */

	pdb->in.pll_icpmset_p = 0;	/* 0, reg: 0x04f4, bit 0 - 2 */

	pdb->in.pll_icpmset_m = 0;	/* 0, reg: 0x04f4, bit 3 - 5 */

	pdb->in.pll_icpcset_p = 0;	/* 0, reg: 0x04f8, bit 0 - 2 */