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Commit cba56402 authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
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Merge "qpnp-fg-gen3: add support to configure and handle delta battery temperature"

parents cc15ff22 21005fbb
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+63 −0
Original line number Diff line number Diff line
@@ -153,6 +153,69 @@ First Level Node - FG Gen3 device
		    loaded earlier by bootloader doesn't match with the profile
		    available in the device tree.

- qcom,cl-start-capacity
	Usage:      optional
	Value type: <u32>
	Definition: Battery SOC threshold to start the capacity learning.
		    If this is not specified, then the default value used
		    will be 15.

- qcom,cl-min-temp
	Usage:      optional
	Value type: <u32>
	Definition: Lower limit of battery temperature to start the capacity
		    learning. If this is not specified, then the default value
		    used will be 150. Unit is in decidegC.

- qcom,cl-max-temp
	Usage:      optional
	Value type: <u32>
	Definition: Upper limit of battery temperature to start the capacity
		    learning. If this is not specified, then the default value
		    used will be 450 (45C). Unit is in decidegC.

- qcom,cl-max-increment
	Usage:      optional
	Value type: <u32>
	Definition: Maximum capacity increment allowed per capacity learning
		    cycle. If this is not specified, then the default value
		    used will be 5 (0.5%). Unit is in decipercentage.

- qcom,cl-max-decrement
	Usage:      optional
	Value type: <u32>
	Definition: Maximum capacity decrement allowed per capacity learning
		    cycle. If this is not specified, then the default value
		    used will be 100 (10%). Unit is in decipercentage.

- qcom,cl-min-limit
	Usage:      optional
	Value type: <u32>
	Definition: Minimum limit that the capacity cannot go below in a
		    capacity learning cycle. If this is not specified, then
		    the default value is 0. Unit is in decipercentage.

- qcom,cl-max-limit
	Usage:      optional
	Value type: <u32>
	Definition: Maximum limit that the capacity cannot go above in a
		    capacity learning cycle. If this is not specified, then
		    the default value is 0. Unit is in decipercentage.

- qcom,fg-jeita-hyst-temp
	Usage:      optional
	Value type: <u32>
	Definition: Hysteresis applied to Jeita temperature comparison.
		    Possible values are:
			0 - No hysteresis
			1,2,3 - Value in Celsius.

- qcom,fg-batt-temp-delta
	Usage:      optional
	Value type: <u32>
	Definition: Battery temperature delta interrupt threshold. Possible
		    values are: 2, 4, 6 and 10. Unit is in Kelvin.

==========================================================
Second Level Nodes - Peripherals managed by FG Gen3 driver
==========================================================
+28 −3
Original line number Diff line number Diff line
@@ -68,6 +68,7 @@ enum fg_debug_flag {
	FG_SRAM_READ		= BIT(4), /* Show SRAM reads */
	FG_BUS_WRITE		= BIT(5), /* Show REGMAP writes */
	FG_BUS_READ		= BIT(6), /* Show REGMAP reads */
	FG_CAP_LEARN		= BIT(7), /* Show capacity learning */
};

/* SRAM access */
@@ -119,6 +120,9 @@ enum fg_sram_param_id {
	FG_SRAM_OCV,
	FG_SRAM_RSLOW,
	FG_SRAM_ALG_FLAGS,
	FG_SRAM_CC_SOC,
	FG_SRAM_CC_SOC_SW,
	FG_SRAM_ACT_BATT_CAP,
	/* Entries below here are configurable during initialization */
	FG_SRAM_CUTOFF_VOLT,
	FG_SRAM_EMPTY_VOLT,
@@ -182,6 +186,15 @@ struct fg_dt_props {
	int	esr_timer_awake;
	int	esr_timer_asleep;
	bool	force_load_profile;
	int	cl_start_soc;
	int	cl_max_temp;
	int	cl_min_temp;
	int	cl_max_cap_inc;
	int	cl_max_cap_dec;
	int	cl_max_cap_limit;
	int	cl_min_cap_limit;
	int	jeita_hyst_temp;
	int	batt_temp_delta;
};

/* parameters from battery profile */
@@ -203,6 +216,16 @@ struct fg_cyc_ctr_data {
	struct mutex	lock;
};

struct fg_cap_learning {
	bool		active;
	int		init_cc_soc_sw;
	int64_t		nom_cap_uah;
	int64_t		init_cc_uah;
	int64_t		final_cc_uah;
	int64_t		learned_cc_uah;
	struct mutex	lock;
};

struct fg_irq_info {
	const char		*name;
	const irq_handler_t	handler;
@@ -222,22 +245,25 @@ struct fg_chip {
	struct fg_irq_info	*irqs;
	struct votable		*awake_votable;
	struct fg_sram_param	*sp;
	struct fg_alg_flag	*alg_flags;
	int			*debug_mask;
	char			batt_profile[PROFILE_LEN];
	struct fg_dt_props	dt;
	struct fg_batt_props	bp;
	struct fg_cyc_ctr_data	cyc_ctr;
	struct notifier_block	nb;
	struct fg_cap_learning  cl;
	struct mutex		bus_lock;
	struct mutex		sram_rw_lock;
	u32			batt_soc_base;
	u32			batt_info_base;
	u32			mem_if_base;
	int			batt_id;
	int			nom_cap_uah;
	int			status;
	int			prev_status;
	int			charge_done;
	int			last_soc;
	int			last_batt_temp;
	int			health;
	bool			profile_available;
	bool			profile_loaded;
	bool			battery_missing;
@@ -247,7 +273,6 @@ struct fg_chip {
	struct delayed_work	profile_load_work;
	struct work_struct	status_change_work;
	struct work_struct	cycle_count_work;
	struct fg_alg_flag	*alg_flags;
};

/* Debugfs data structures are below */
+1 −0
Original line number Diff line number Diff line
@@ -126,6 +126,7 @@

/* BATT_INFO_BATT_TEMP_CFG */
#define JEITA_TEMP_HYST_MASK			GENMASK(5, 4)
#define JEITA_TEMP_HYST_SHIFT			4
#define JEITA_TEMP_NO_HYST			0x0
#define JEITA_TEMP_HYST_1C			0x1
#define JEITA_TEMP_HYST_2C			0x2
+6 −0
Original line number Diff line number Diff line
@@ -83,6 +83,9 @@ int fg_sram_write(struct fg_chip *chip, u16 address, u8 offset,
	if (!chip)
		return -ENXIO;

	if (chip->battery_missing)
		return -ENODATA;

	if (!fg_sram_address_valid(address, len))
		return -EFAULT;

@@ -147,6 +150,9 @@ int fg_sram_read(struct fg_chip *chip, u16 address, u8 offset,
	if (!chip)
		return -ENXIO;

	if (chip->battery_missing)
		return -ENODATA;

	if (!fg_sram_address_valid(address, len))
		return -EFAULT;

+549 −37

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