Merge "Merge android-4.4@59ff2e1 (v4.4.78) into msm-4.4" (cb10479c) · Commits · e / devices / android_kernel_sony_msm8998

Makefile

+1 −1

+0 −1

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		@@ -17,7 +17,6 @@ CONFIG_AUDIT=y
		CONFIG_BLK_DEV_INITRD=y
		CONFIG_CGROUPS=y
		CONFIG_CGROUP_CPUACCT=y
		CONFIG_CGROUP_DEBUG=y
		CONFIG_CGROUP_FREEZER=y
		CONFIG_CGROUP_SCHED=y
		CONFIG_DEFAULT_SECURITY_SELINUX=y

+2 −6

Original line number	Diff line number	Diff line
		@@ -112,12 +112,8 @@ int dump_task_regs(struct task_struct t, elf_gregset_t elfregs);
		#define CORE_DUMP_USE_REGSET
		#define ELF_EXEC_PAGESIZE 4096

		/* This is the location that an ET_DYN program is loaded if exec'ed. Typical
		use of this is to invoke "./ld.so someprog" to test out a new version of
		the loader. We need to make sure that it is out of the way of the program
		that it will "exec", and that there is sufficient room for the brk. */

		#define ELF_ET_DYN_BASE (TASK_SIZE / 3 * 2)
		/* This is the base location for PIE (ET_DYN with INTERP) loads. */
		#define ELF_ET_DYN_BASE 0x400000UL

		/* When the program starts, a1 contains a pointer to a function to be
		registered with atexit, as per the SVR4 ABI. A value of 0 means we

+6 −6

Original line number	Diff line number	Diff line
		@@ -114,12 +114,11 @@
		#define ELF_EXEC_PAGESIZE PAGE_SIZE

		/*
		* This is the location that an ET_DYN program is loaded if exec'ed. Typical
		* use of this is to invoke "./ld.so someprog" to test out a new version of
		* the loader. We need to make sure that it is out of the way of the program
		* that it will "exec", and that there is sufficient room for the brk.
		* This is the base location for PIE (ET_DYN with INTERP) loads. On
		* 64-bit, this is raised to 4GB to leave the entire 32-bit address
		* space open for things that want to use the area for 32-bit pointers.
		*/
		#define ELF_ET_DYN_BASE (2 * TASK_SIZE_64 / 3)
		#define ELF_ET_DYN_BASE 0x100000000UL

		#ifndef __ASSEMBLY__

		@@ -170,7 +169,8 @@ extern int arch_setup_additional_pages(struct linux_binprm *bprm,

		#ifdef CONFIG_COMPAT

		#define COMPAT_ELF_ET_DYN_BASE (2 * TASK_SIZE_32 / 3)
		/* PIE load location for compat arm. Must match ARM ELF_ET_DYN_BASE. */
		#define COMPAT_ELF_ET_DYN_BASE 0x000400000UL

		/* AArch32 registers. */
		#define COMPAT_ELF_NGREG 18

+7 −4

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		@@ -39,6 +39,8 @@ struct hppa_dma_ops {
		** flush/purge and allocate "regular" cacheable pages for everything.
		*/

		#define DMA_ERROR_CODE (~(dma_addr_t)0)

		#ifdef CONFIG_PA11
		extern struct hppa_dma_ops pcxl_dma_ops;
		extern struct hppa_dma_ops pcx_dma_ops;
		@@ -209,12 +211,13 @@ parisc_walk_tree(struct device *dev)
		break;
		}
		}
		BUG_ON(!dev->platform_data);
		return dev->platform_data;
		}

		#define GET_IOC(dev) (HBA_DATA(parisc_walk_tree(dev))->iommu)

		#define GET_IOC(dev) ({ \
		void *__pdata = parisc_walk_tree(dev); \
		__pdata ? HBA_DATA(__pdata)->iommu : NULL; \
		})

		#ifdef CONFIG_IOMMU_CCIO
		struct parisc_device;