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Commit ca484744 authored by Neeraj Upadhyay's avatar Neeraj Upadhyay
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Revert "arm: cpu: read all address cells in dt for cpuid" 



This reverts commit e6855ed3 ("arm: cpu: read all
address cells in dt for cpuid"). The address cells read
issue is fixed in upstream commit c84cc7b9 ("ARM:
8616/1: dt: Respect property size when parsing CPUs"),
and both changes conflict and break the parsing of address
cells.

Change-Id: Iafd918ce8623ceb0c701df15bbdbccba165c89dd
Signed-off-by: default avatarNeeraj Upadhyay <neeraju@codeaurora.org>
parent 60be7160

arch/arm/kernel/devtree.c

+6 −5
Original line number Diff line number Diff line
@@ -87,9 +87,9 @@ void __init arm_dt_init_cpu_maps(void) 
		return;



	for_each_child_of_node(cpus, cpu) {

		const __be32 *cell;

		int prop_bytes;

		u32 hwid;

		const __be32 *cell;



		if (of_node_cmp(cpu->type, "cpu"))

			continue;
@@ -100,13 +100,14 @@ void __init arm_dt_init_cpu_maps(void) 
		 * properties is considered invalid to build the

		 * cpu_logical_map.

		 */

		cell = of_get_property(cpu, "reg", NULL);

		if (!cell) {

			pr_err("%s: missing reg property\n", cpu->full_name);

		cell = of_get_property(cpu, "reg", &prop_bytes);

		if (!cell || prop_bytes < sizeof(*cell)) {

			pr_debug(" * %s missing reg property\n",

				     cpu->full_name);

			of_node_put(cpu);

			return;

		}

		hwid = of_read_number(cell, of_n_addr_cells(cpu));



		/*

		 * Bits n:24 must be set to 0 in the DT since the reg property

		 * defines the MPIDR[23:0].