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Commit ca291363 authored by Paulo Zanoni's avatar Paulo Zanoni Committed by Daniel Vetter
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drm/i915: there's no DSPADDR register on Haswell



So don't read it when we hang the GPU. This solves "unclaimed
register" messages.

Signed-off-by: default avatarPaulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: default avatarBen Widawsky <ben@bwidawsk.net>
[danvet: Future-proof by adding a gen >= 7 check in addition to the
!IS_HSW check from Paulo's original patch, suggested by Ben.]
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 51889b35
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+4 −2
Original line number Diff line number Diff line
@@ -9349,6 +9349,7 @@ intel_display_capture_error_state(struct drm_device *dev)
		if (INTEL_INFO(dev)->gen <= 3)
			error->plane[i].size = I915_READ(DSPSIZE(i));
		error->plane[i].pos = I915_READ(DSPPOS(i));
		if (INTEL_INFO(dev)->gen <= 7 && !IS_HASWELL(dev))
			error->plane[i].addr = I915_READ(DSPADDR(i));
		if (INTEL_INFO(dev)->gen >= 4) {
			error->plane[i].surface = I915_READ(DSPSURF(i));
@@ -9394,6 +9395,7 @@ intel_display_print_error_state(struct seq_file *m,
		if (INTEL_INFO(dev)->gen <= 3)
			seq_printf(m, "  SIZE: %08x\n", error->plane[i].size);
		seq_printf(m, "  POS: %08x\n", error->plane[i].pos);
		if (!IS_HASWELL(dev))
			seq_printf(m, "  ADDR: %08x\n", error->plane[i].addr);
		if (INTEL_INFO(dev)->gen >= 4) {
			seq_printf(m, "  SURF: %08x\n", error->plane[i].surface);